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Hardware/Software Partitioning

Hardware/Software Partitioning. Witawas Srisa-an Embedded Systems Design and Implementation. Why so many of you could not get significant performance gains through the Stretch Processors?. Hardware/software Partitioning.

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Hardware/Software Partitioning

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  1. Hardware/Software Partitioning Witawas Srisa-an Embedded Systems Design and Implementation

  2. Why so many of you could not get significant performance gains through the Stretch Processors?

  3. Hardware/software Partitioning • Decide which functions to be done in the software and which in the hardware • Cost versus performance • Hardware--more cost and risk • Software—more development time • examples • The ol’386/387 • Graphic accelerator • Ideally, delay the decision until solutions are known • But this may not be possible • Idling software developers • Big timing differences in development

  4. Software Side • Compile code to existing but not complete environment • Stub code can be used to simulate hardware interaction • Function calls that simulate non existing hardware • Calls to memory mapped I/O registers • Also work well with evolution boards • Supply by manufacturers • Incremental code written in anticipation for new hardware components • Based on known hardware specification

  5. Hardware • SoC • Mapping of complex algorithms into hardware is now possible • ½ reduction in physical size = 4 times the amount of gates • 0.35 micron to 0.18 micron • Increasing wafer size • Silicon compilation • VHDL or Verilog • All modern processors use this approach • IP from third party vendors • Fab-less vendors (Advanced RISC Machines)

  6. Dealing with Defects • Software bugs are tolerable and less costly to fix. Hardware bugs on the other hand… • Can cost hundreds of thousands in nonrecoverable cost (NRE) • Months of delay • Many start-ups went down because of this reason • Non-performing hardware • Repartitioning decision in the last minute

  7. HW/SW Co-design and Co-verification • Silicon compilation creates a single software database • One for describing hardware fabrication • One for controlling the hardware itself Software Development Specification Prototype Integrate and Test Hardware Development Development Time

  8. HW/SW Co-design and Co-verification • Silicon compilation creates a single software database • One for describing hardware fabrication • One for controlling the hardware itself Software Development Specification Integrate and Test Hardware Development Prototype saving

  9. HW/SW Co-design and Co-verification • Tools that bridge hardware and software • Co-design: develop hardware and controlling software together • Co-verification: verifying the correctness of hardware/software interface • Instruction Set Simulator • Bus functional model—translate high-level interface code to test vectors

  10. Today’s Design Flow Iterate Software Software Process C/C++ code Stub code Object Code Codesign Phase Integrate HDL Test Vector/ Simulation Si Foundry DB Hardware Process Re-spin the ASIC

  11. Summary • The line that separates hardware and software is blurring • The design processes can be viewed as similar • The artifacts can also be viewed as similar • Co-design and co-verification can reduce the development time/cost and promote better synchronization between software and hardware engineers.

  12. Once you’ve decide … • Hardware • ASIC • Stretch • What else? • Software • C/C++ • Assembly • Java, .NET

  13. Instruction Extension • Many soft-core processors today allow you to create custom instruction (e.g. Altera Nios) • add your own logic block • create software macro to access the new instruction • can be combinational (single-cycle) or sequential (multi-cycle)

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