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Trends and Challenges in On-Chip Communication Design: Insights from Industry Experts

Explore the current trends and challenges in on-chip communication design as presented by Drew Wingard, CTO of Sonics, Inc., during the MEMOCODE 2008 panel. Wingard discusses the evolution of interconnect networks, their application in consumer electronics and heterogeneous multicore SoCs, and the importance of defining flexible fabric protocols. He emphasizes the need for improved interoperability, enhanced designer assistance, and the role of Quality of Service (QoS) in network design. Learn about innovative methodologies for generating interconnects tailored to specific applications.

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Trends and Challenges in On-Chip Communication Design: Insights from Industry Experts

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  1. Methodologies for On-Chip Communication Design: Trends and Challenges Drew WingardCTOSonics, Inc.

  2. My Vantage Point • Founding CTO of first(?) on-chip communication network provider (1996) • Perhaps we were a bit ahead of our time! • Application focus • Early days: network “edge” devices • Since 2000: consumer electronics (inc. mobile phones) • Dominant (customer-determined) architecture • Heterogeneous multicore SoCs • Performance typically determined by external memory • Tend to have good vision match with market leaders • Customers have shipped over 250 million ICs based on Sonics MEMOCODE 2008 Panel

  3. Methodologies for On-Chip Communication Design As an IP provider, see this as two related areas: • Design of the interconnect network generators • Creation of flexible fabric protocols • Covering widest range of frequency, span, concurrency, etc. • Definition of available “data flow services” • QoS, security, power mgmt., error mgmt., etc. • Implementation & verification of the generators • Design of the SoC-specific interconnect network • Start with abstract network in data flow model • Refine/configure to satisfy application requirements • Generate & verify network in context of SoC Us Customer MEMOCODE 2008 Panel

  4. Lessons & Methods: Interconnect Generators MEMOCODE 2008 Panel

  5. Lessons & Methods: SoC-specific Networks MEMOCODE 2008 Panel

  6. On-Chip Communication Design Trends • Interoperability among design phases/environments • SPIRIT IP-XACT & Eclipse are current best hope • More designer assistance • Configuration wizards -> network synthesis • Bigger building blocks (subsystems) • With own local interconnects • Increased power sensitivity • GALS, power/voltage domains, flexible clock ratios MEMOCODE 2008 Panel

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