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VLSI Digital System Design

This article discusses the implementation of Booth's Algorithm for efficient multiplication in VLSI digital systems. It illustrates how multiplication can be accelerated, particularly with large numbers of consecutive 1s in the multiplier, through the replacement of consecutive additions with subtraction and strategic repositioning. Additionally, we explore higher-radix multiplication techniques, such as radix-4 booth recoding, emphasizing the benefits of examining multiple bits at a time. The details of control signals and practical examples of 16-bit multiplication illustrate the algorithm's effectiveness in digital system design.

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VLSI Digital System Design

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  1. Multiplication VLSI Digital System Design

  2. Booth's Algorithm • Multiplication can be sped up • When large number of consecutive 1sin multiplier • Replace consecutive additions • Subtract at least-significant end • Add at position to the left ofthe most-significant end

  3. 16-Bit Booth's Algorithm Examples • Bits in multiplier andcorresponding actions to take • 1 1 1 1 0 0 0 1 0 1 1 0 1 0 1 01 0 0 0 -1 0 0 1 -1 1 0 -1 1 -1 1 -1 0 • 1 0 0 1 1 1 0 1 1 0 1 0 1 1 1 01 -1 0 1 0 0 -1 1 0 -1 1 -1 1 0 0 -1 0

  4. Higher-Radix Multiplication • Retire k low-order bits of multiplierat each step, rather than just one bit: radix 2 • E.g., let k = 2: radix 4 • Let b = multiplicand • If 00, add 0 • If 01, add b • If 10, add 2b: shift and add • If 11, add 2b + b: avoid with Booth recoding

  5. Booth Recoding • If 11, add 2b + b: avoid with Booth recoding • 0011 = 0100 – 0001 • If 11, subtract b andadd 1 to next-higher group of k bits • Also called overlapping triplets • It looks at 3 bits at a time • Ordinary radix-4 multiplication looks at2 bits at a time

  6. Radix-4 Booth Recoding Rules • Cur pair Previous bit i+1 i i–1 Add 2i+1 Add 2i Add0 0 0 00 00 +00 0 1 00 01 End +b +b 0 1 0 01 End +2b 10 Beg -b +b 0 1 1 01 End +2b 11 Cont +2b1 0 0 10 Beg -2b 00 -2b1 0 1 10 Beg -2b 01 End +b -b1 1 0 11 Cont 10 Beg -b -b1 1 1 11 Cont 11 Cont +0

  7. Booth Recoding Control Signals • Cur pair Previous bit i+1 i i–1 Add Neg Zero Two0 0 0 +0 0 1 00 0 1 +b 0 0 00 1 0 +b 0 0 00 1 1 +2b 0 0 11 0 0 -2b 1 0 11 0 1 -b 1 0 01 1 0 -b 1 0 01 1 1 +0 1 1 0

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