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ECE 667 Spring 2013 Synthesis and Verification of Digital Systems

ECE 667 Spring 2013 Synthesis and Verification of Digital Systems. Multi-level Logic Minimization Factored Forms. Slides adapted (with permission) from A. Kuehlmann, UC Berkeley 2003. Outline. Factored forms Motivation: multi-level logic representation Definitions, theory, examples

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ECE 667 Spring 2013 Synthesis and Verification of Digital Systems

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  1. ECE 667Spring 2013Synthesis and Verificationof Digital Systems Multi-level Logic Minimization Factored Forms Slides adapted (with permission) from A. Kuehlmann, UC Berkeley 2003

  2. Outline • Factored forms • Motivation: multi-level logic representation • Definitions, theory, examples • Manipulation of Boolean networks • Algebraic (structural) vs Boolean methods • Decomposition • Extraction • Factorization • Substitution (elimination) • Collapsing ECE 667 Synthesis & Verification - Factored Forms

  3. General Logic Structure • Combinational optimization (CL blocks) • Keep latches/registers at current positions, keep their function • Optimize combinational logic domains expressed as multi-level logic • Need efficient representation of multi-level logic ECE 667 Synthesis & Verification - Factored Forms

  4. Multi-level Logic • Logic represented as a network of logic gates from cell library • Multi-level logic optimization • Logic decomposition and optimization • Technology mapping ECE 667 Synthesis & Verification - Factored Forms

  5. Optimization Criteria for Synthesis The optimization criteria for multi-level logic is to minimizesome function of: • Area occupied by the logic gates and interconnect (approximated by literals = transistors in technology independent optimization) • Critical path delayof the longest path through the logic • Degree of testability of the circuit, measured in terms of the percentage of faults covered by a specified set of test vectors for an approximate fault model (e.g. single or multiple stuck-at faults) • Power consumed by the logic gates • Noise Immunity • Physical design constraints ECE 667 Synthesis & Verification - Factored Forms

  6. Transformation-based Synthesis • Set of transformations that change network topology • All modern synthesis systems are build that way • work on uniform network representation • Transformations are mostly algebraic ! (very little is based on Boolean factorization) • Representation • Cube notation, BDDs, AIGs • The underlying algorithms • Algebraic transformations • Collapsing, decomposition • Factorization, substitution • Transformations differ in scope • Local (node optimization) • Global (network restructuring) ECE 667 Synthesis & Verification - Factored Forms

  7. Global vs Local Transformations • Global transformations restructure the entire network • merging nodes • spitting nodes • removing/changing connections between nodes, etc. • Local transformations optimize the function of one node of thenetwork • smaller area • better performance • map to a particular set of cells (library) • Node representation: • SOP, POS • BDD • Factored forms • keep size bounded to avoid blow-up of local transformations ECE 667 Synthesis & Verification - Factored Forms

  8. RTL to Network Transformation Technology independent Optimizations Technology Dependent Optimizations Technology Mapping Test Preparation Typical Synthesis Scenario - read HDL - control/data flow analysis - basic logic restructuring - crude measures for goals - use logic gates from target cell library - timing optimization - physically driven optimizations - improve testability - test logic insertion ECE 667 Synthesis & Verification - Factored Forms

  9. Network Representation Boolean network: • directed acyclic graph (DAG) • node logic function representation fj(x,y) • node variableyj: yj= fj(x,y) • edge (i,j)if fjdepends explicitly on yi Inputs x = (x1, x2,…,xn ) Outputs z = (z1, z2,…,zp ) External don’t cares: d1(x), …, dp(x) ECE 667 Synthesis & Verification - Factored Forms

  10. Factored Forms Example: (ad+b’c)(c+d’(e+ac’))+(d+e)fg Advantages • good representative of logic complexity f=ad+ae+bd+be+cd+ce f’=a’b’c’+d’e’  f=(a+b+c)(d+e) • in many designs (e.g. complex gate CMOS) the implementation of a function corresponds directly to its factored form • good estimator of logic implementation complexity • doesn’t blow up easily Disadvantages • not as many algorithms available for manipulation • hence often just convert into SOP before manipulation ECE 667 Synthesis & Verification - Factored Forms

  11. Factored Forms and CMOS Design Note: literal count »transistor count » area • however, area also depends on • wiring • gate size etc. • therefore a very crude measure ECE 667 Synthesis & Verification - Factored Forms

  12. Deriving Factored Forms • Multi-level logic is represented in factored form. • Metric: number of literals • Given an F in SOP form, how do we generate a “good” factored form • Division operation: • central in many operations • need to find a good divisor D • apply the actual division: F = Q D + R • Applications: • factoring • substitution • extraction ECE 667 Synthesis & Verification - Factored Forms

  13. Algebraic Expressions Definition 1:f is an algebraic expression if f is a set of cubes (SOP), such that no single cube contains another (minimal with respect to single cube containment) Examples: ab + acis an algebraic expression a + abis not an algebraic expression (a containsab) Definition 2:The product of two expressions f and g is a set defined byfg = {cd | c  f and d  g and cd  0} Example:(a+b)(c+d+a’)=ac+ad+bc+bd+a’b Definition 3:fg is an algebraic product if f and g are algebraic expressions and have disjoint support (that is, they have no input variables in common) Example:(a+b)(c+d)=ac+ad+bc+bd is an algebraic product ECE 667 Synthesis & Verification - Factored Forms

  14. Factored Forms Definition 4:The factored form can be defined recursively by the following rules. A factored form is either a product or sum where: • a product is either a single literal or a product of factored forms • a sum is either a single literal or a sum of factored forms A factored form is a parenthesized algebraic expression. In effect a factored form is a product of sums of products … or a sum of products of sums … Any logic function can be represented by a factored form, and any factored form is a representation of some logic function. ECE 667 Synthesis & Verification - Factored Forms

  15. Factored Form Examples Examples of factored forms: x y’ abc’ a+b’c ((a’+b)cd+e)(a+b’)+e’ (a+b)’cis not a factored form since complementation is not allowed,except on literals. Three equivalent factored forms (factored forms are not unique): ab+c(a+b) bc+a(b+c) ac+b(a+c) ECE 667 Synthesis & Verification - Factored Forms

  16. Factorization Value Definition 5:The factorization value of an algebraic factorization F=G1G2+Ris defined to be fact_val(F,G2) = lits(F)-( lits(G1)+lits(G2)+lits(R) ) = (|G1|-1) lits(G2) + (|G2|-1) lits(G1) G1, G2 and R are algebraic expressions, and |G| = number of cubes in the SOP form of G, lits(G) = number of literals of G. Example: The expressionF = ae+af+ag+bce+bcf+bcg+bde+bdf+bdg can be expressed in the form F = (a+bc+bd))(e+f+g), which requires 8 literals, rather than 24 (gain = 16). That is: for G1=(a+bc+bd),G2=(e+f+g)andR=, fact_val(F,G2) = 23+25=16. Recursive factorization applied to G1= a+bc+bd= a + b(c+d) saves one extra literal. ECE 667 Synthesis & Verification - Factored Forms

  17. Factored Forms Factored forms are more compact representations of logic functions than the traditional sum of products form. Example: factored form F =(a+b)(c+d(e+f(g+h+i+j) while its SOP represented is: F =ac+ade+adfg+adfh+adfi+adfj+bc+bde+bdfg+ bdfh+bdfi+bdfj Every SOP is a factored form, but it may not be a good factorization. ECE 667 Synthesis & Verification - Factored Forms

  18. Factored Forms When measured in terms of number of inputs, there are functions whose size is exponential in sum of products representation, but polynomial in factored form. Example:Achilles’ heel function There are n literals in the factored form and (n/2)2n/2 literals in the SOP form. Factored forms are useful in estimating area and delay in a multi-level synthesis and optimization system. In many design styles (e.g. complex gate CMOS design) the implementation of a function corresponds directly to its factored form. ECE 667 Synthesis & Verification - Factored Forms

  19. Factored Forms as Trees Factored forms cam be graphically represented as labeled trees, called factoring trees, in which each internal node including the root is labeled with either +or, and each leaf has a label of either a variable or its complement. Example: factoring tree of ((a’+b)cd+e)(a+b’)+e’ ECE 667 Synthesis & Verification - Factored Forms

  20. Characteristics of Factored Forms Definition 6: The size of a factored form F (denoted (F)) is the number of literals in the factored form. Example:(( a+b)ca’) = 4((a+b+cd)(a’+b’)) = 6 • A factored form is optimalif no other factored form (for that function) has fewer literals. • A factored form is positive unate in x,if x appears in F, but x’ does not. • A factored form is negative unate in x,if x’ appears in F, but x does not. • F is unate in x if it is either positive or negative unate in x, otherwise F is binate in x. Example: (a+b’)c+a’ is positive unate in c, negative unate in b, and binate in a. ECE 667 Synthesis & Verification - Factored Forms

  21. Manipulation of Boolean Networks Basic Techniques: • structural operations (change topology) • Algebraic: ab + ac = a(b+c) • Boolean: a + bc = (a+b)(a+c) • node simplification (change node functions) • don’t cares • node minimization All algorithms used in today’s commercial synthesis tools use ALGEBRAIC techniques • not as efficient as Boolean methods, but faster ECE 667 Synthesis & Verification - Factored Forms

  22. Why Use Algebraic Methods? • Need spectrum of operations • algebraic methods provide fast algorithms • Treat logic function as a polynomial • efficient data structures • fast methods for manipulation of polynomials available • Loss of optimality, but results are quite good • Can iterate and interleave with Boolean operations • In specific instances slight extensions available to include Boolean methods ECE 667 Synthesis & Verification - Factored Forms

  23. Structural Operations Restructuring Problem:Given initial network, find best network. Example:f1 = abcd+abce+ab’cd’+ab’c’d’+a’c+cdf+abc’d’e’+ab’c’df’ f2 = bdg+b’dfg+b’d’g+bd’eg • SOP minimization f1 = bcd+bce+b’d’+a’c+cdf+abc’d’e’+ab’c’df’ f2 = bdg+dfg+b’d’g+d’eg • factoring f1 = c(b(d+e)+b’(d’+f)+a’)+ac’(bd’e’+b’df’) f2 = g(d(b+f)+d’(b’+e)) • decomposition f1 = c(x+a’)+ac’x’ f2 = gx x = d(b+f)+d’(b’+e) Two main problems: • find good common subfunctions • effect the division ECE 667 Synthesis & Verification - Factored Forms

  24. Structural Operations (algebraic) Basic Operations: 1. Factoring (series-parallel decomposition) f = ac+ad+bc+bd+e  f = (a+b)(c+d)+e 2. Extraction & decomposition - single output (extraction) f = abc+abd+a’c’d’+b’c’d’  f = xy+x’y’, x = ab, y = c+d - multiple outputs (decomposition) f = (az+bz’)cd+e g = (az+bz’)e’ h = cde  f = xy+e, g = xe’, h = ye, x = az+bz’, y = cd ECE 667 Synthesis & Verification - Factored Forms

  25. Structural Operations, cont’d. 3. Substitution g = a+b f = ac+bc + d  f = gc+d 4. Collapsing (elimination) f = ga+g’b g = c+d  f = ac+ad+bc’d’ Note: algebraic division plays a key role in all these algorithms: • given function f, find g such that f = g h, where support(g)  support(h) =  ECE 667 Synthesis & Verification - Factored Forms

  26. Factoring vs. Decomposition Factoring: f = (e+g’)(d(a+c)+a’b’c’)+b(a+c) Decomposition:f =y(b+dx)+xb’y’, where: x = a+c, y = e+g’ Note:: this is an example of Boolean operation, similar to BDD collapsing of common nodes and using negative edge pointers. But it is not canonical, so it doesn’t have perfect identification of common nodes. Tree DAG ECE 667 Synthesis & Verification - Factored Forms

  27. These nodes are expressed in terms of nodeyj (contain literal yj) Value of Node Elimination ni = number of times literalyjoryj’occurs in factored formfi lj = number of literals in factored formfj No. of literals without factoring: No. of literals with factoring: • value (gain) of node j=cost(without factoring) - cost(with factoring) Note: we can treat yjand yj’ the same way since ( Fj ) = ( Fj’ ). ECE 667 Synthesis & Verification - Factored Forms

  28. Node to be eliminated, present as literal x in its fanout Value of Node Elimination x Literals before = 5+7+5 = 17 Literals after = 9+15 = 24 ------ Gain = -7 Difference after - before = value = -7 (value = 7 if going in the opposite direction) But we may not have the same value if we were to eliminate, simplify and then re-factor. Node elimination value depends on the sequence of operations. ECE 667 Synthesis & Verification - Factored Forms

  29. Value of a Node Elimination value=3 Note: value of a node can change during elimination ECE 667 Synthesis & Verification - Factored Forms

  30. Optimum Factored Forms • Definition 7: • Let f be a completely specified Boolean function, and (f) be the minimum number of literals in any factored form of f. • Definition 8: • Let sup(f) be the true variable support of f, i.e. the set of variables f depends on. Two functions f and g are orthogonal (f  g), if sup(f)  sup(g)=. ECE 667 Synthesis & Verification - Factored Forms

  31. Optimum Factored Forms Lemma: Let f=g+h such that g  h, then (f)=(g)+(h). Proof: Let F, G and H be the optimum factored forms of f, g and h. Since G+H is a factored form, (f)=(F) (G+H)=(g)+(h). Let c be a minterm, on sup(g), of g’. Since g and h have disjoint support, we have fc=(g+h)c=gc+hc=0+hc=hc=h. Similarly, if d is a minterm of h’, fd=g. Because (h)=(fc)(Fc) and (g)=(fd)(Fd), (h)+(g)(Fc)+(Fd). Let m (n) be the number of literals in F that are from SUPPORT(g) (SUPPORT(h)). When computing Fc (Fd), we replace all the literals from SUPPORT(g) (SUPPORT(h)) by the appropriate values and simplify the factored form by eliminating all the constants and possibly some literals from sup(g) (sup(h)) by using the Boolean identities. Hence (Fc)n and (Fd)m. Since (F)=m+n, (Fc)+(Fd)m+n=(F). We have (f)(g)+(h)  (Fc)+(Fd)(F) (f)=(F). ECE 667 Synthesis & Verification - Factored Forms

  32. Optimum Factored Forms Note: the previous result does not imply that all minimum literal factored forms of f are sums of the minimum literal factored forms of g and h. Corollary: Let f = g h such that g h. Then (f)=(g)+(h). Proof: Let F’ denote the factored form obtained using DeMorgan’s law. Then (F)=(F’),and therefore (f)=(f’). From the above lemma, we have (f)=(f’)=(g’+h’)=(g’)+(h’)=(g)+(h). Theorem: Let such that fij fkl,  ij or kl, then Proof: Use induction on m and then n, and lemma 1 and corollary 1. ECE 667 Synthesis & Verification - Factored Forms

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