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DESIGN OF LOW POWER CURRENT-MODE FLASH ADC

DESIGN OF LOW POWER CURRENT-MODE FLASH ADC. Bhat, M.S.; Rekha, S.; Jamadagni, H.S TENCON 2004. 2004 IEEE Region 10 Conference 指導教授：易序忠 學生：劉得吉 學號： 95662001. OutLine. Abstract Introduction Basics of Current-Mirroring Circuit Implementation Concusions References. Abstract.

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DESIGN OF LOW POWER CURRENT-MODE FLASH ADC

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  1. DESIGN OF LOW POWER CURRENT-MODE FLASH ADC Bhat, M.S.; Rekha, S.; Jamadagni, H.S TENCON 2004. 2004 IEEE Region 10 Conference 指導教授：易序忠 學生：劉得吉 學號：95662001

  2. OutLine • Abstract • Introduction • Basics of Current-Mirroring • Circuit Implementation • Concusions • References

  3. Abstract • For high-speed operation, current mirroring technique with current comparison architecture is used. • The optimization procedure is aimed at minimizing static power consumption, and its impact on circuit performance.

  4. Introduction • Generally, current mode circuits neither require amplifiers with high voltage gains there by reducing the need for high performance amplifiers nor require high precision resistors or capacitors. • The current comparators have high output impedance, which in turn limit the circuit speed. • This paper describes current-mirroring technique with optimal device sizing to achieve signal conversion at low power.

  5. Basics of Current-Mirroring

  6. Basic current comparator circuit The drawback of large output resistance is the increased circuit delay.

  7. Current-mode ADC

  8. Circuit Implementation MP0 – MPP：

  9. Modified current comparator In a higher conversion speed at the expense of increased static power consumption.

  10. Power consumption

  11. Concusions • The maximum sampling rate is found to be 80Ms/Sec and a dynamic range of 32uA. • The circuit operates at 5 volts power supply dissipating an average power of 78mW.

  12. References • C.-C. Chen, C.-Y low-power CMOS current-mode cyclic analog-to-digital converters”, IEEE Trans. on circuits and systems – II: Analog and digital signal processing, vol. 45, no. 1, pp. 28-40, Jan. 1998. • M. P. Fl converters with current-mode interpolation”, IEEE J. of solid-state circuits, vol. 31, no. 9, pp. 1248-1257, Sept. 1996. • D. G. Nairn and C. A. T. Salama, “A ratio-independent algorithmic analog-to-digital converter combining current-mode and dynamic techniques,”IEEE Trans. Circuits and Systems, vol. 37, pp. 319–325, Mar. 1990. • D. G. Nairn and C. A. T. Salama, “Current-mod analog-to-digital converters,”IEEE J. Solid-State Circuits, vol. 25, pp. 997–1004, Aug. 1990. • S. J. Daubert and D. Vallanco current-mode modulator,”IEEE J. Solid-State Circuits, vol. 27, pp. 821–830, May 1992. • D. Macq and P. G. A. Jespers, “A 10-bit pi switched-current A/D converter,”IEEE J. Solid-State Circuits, vol. 29, pp. 967–971, Aug. 1994. • R. C. C. Hui and H. C. Luong pipeline ADC using zero-voltage sampling technique”, IEEE International Symposium on circuits and systems, vol. 1, pp. 9-12, 31 May – 3 Jun, 1998.

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