Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Lecture 1 A review of microelectronics and an introduction to MOS technology
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Why VLSI? • Introduction to integrated circuit technology • - Affected by electronics engineering technology • - Characterization of electronics at present-day • integration improved the design • reduces manufacturing cost
Circuit Design Layout Fabrication Packaging Test Packaging Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut From design to market
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Integrated circuit (IC) era Moore’s law : number of transistors per chip doubles every year
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut IC technology scaling
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Metal-oxide-semiconductor MOS = Metal Oxide Semiconductor In the past : Metal gate over Oxide insulation Present-day : polycrystalline silicon that we call “Poly” We use metal (aluminum) for interconnection wires on the surface of the chip.
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI design process 1. Specification : Defined function, estimate cost Adder 2. Architecture : Large block Partition must be added in good design process if the circuit has complexity.
A B R 1 R 2 R 3 Adder Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI design process 3. Logic :we can divide into 3 steps - Describe the behavior of circuit (Input, Output and behavior C = A + B - Describe the structure of circuit
A B R 1 R 2 R 3 Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI design process - Detail design
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI design process 4. Circuit Transistor : Speed, power 5. Layout : Now we are in those 2 process (process 4 and 5 )
Structural Behavioral device Circuit Logic Architectural Physical Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Relation in design process Today’s view
Custom Performance Std Cell Gate Array FPGA Cost Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Design Technology
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI Technology 1. Schottky TTL (Transistor-transistor logic)
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI Technology 2. ECL (Emitter coupled logic) NOR
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI Technology 3. MOS (Metal Oxide semiconductor) NOR
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut VLSI Technology 4. CMOS (Complementary MOS)
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Transistor Structure
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Manufacturing Steps
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Photolithography Diffusion = High temperature Ion implementation = High velocity
p-tub n-tub substrate Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Process Steps Doped substrate for n-type, p-type transistor
gate oxide poly poly p-tub n-tub Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Process Steps (con’t) Pattern polysilicon before diffusion regions:
poly poly p-tub n+ n+ n-tub p+ p+ Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Process Steps (con’t) Add diffusions, performing self-masking:
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Process Steps (con’t) Start adding metal layers: metal 1 metal 1 vias poly poly p-tub n+ n+ n-tub p+ p+
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut NMOS Process
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Transistor Layout n-type (tubs may vary): L w
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut N-well CMOS Process
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut N-well CMOS Process (con’t)
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut CMOS Transistor layout
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut MOS Symbol nMOS nMOS pMOS enhancement depletion enhancement
Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Discussion and Question
