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P4: specifying data planes P4

P4: specifying data planes http://P4.org. Intel – Hillsboro, OR July 10, 2018. Mihai Budiu VMware Research Group. My Background. Ph.D. from CMU (computer architecture, compilers) Microsoft Research (security, big data, machine learning) Barefoot Networks (P4 design and implementation)

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P4: specifying data planes P4

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  1. P4: specifying data planeshttp://P4.org Intel – Hillsboro, ORJuly 10, 2018 Mihai Budiu VMware Research Group

  2. My Background Ph.D. from CMU (computer architecture, compilers) Microsoft Research(security, big data, machine learning) Barefoot Networks(P4 design and implementation) VMware Research(P4, SDNs, big data) Note: I am not a networking person

  3. My involvement with P4 Hired at to work on the design and implementation of P4 In Barefoot led the group that created the first P416 draft document Started (with Chris Dodd) the C++ reference compiler implementation Main contributor to the open-source P4 compiler front-end, mid-end and several back-ends Pushed P416 through standardization process Currently co-chair of the P4 language design working group

  4. What I can talk about today • P416 programming language • Language design • Language/architecture separation • Portability vs. extensibility • P416 reference compiler architecture • How to extend the compiler for a new target • Compiling P4->eBPF • Compiling to eBPF (packet filters) • Compiling to XDP (packet switching) • Comparing P4 and eBPF • These are organized as 3 separate PPTX presentations

  5. What I don’t plan to cover P414(the old version of P4) Run the P4 tutorials (given at P4 developer days) Demonstrate P4-related tools (compilers, simulators, IDEs) The P4 control-plane API (P4Runtime) The P4 Portable Switch Architecture Various applications written in P4

  6. Presentation outline • P4 & Programmable networks • Why should you care? • An introduction to P416 • P4 limitations • Conclusions

  7. Networking 101 Data packets switches/routers

  8. Switch Control and Data Planes Switch architecture Control plane packets Data plane Interfaces

  9. Traditional switch architecture Control-plane CPU Control plane Table management Data plane Switch ASIC Look-up tables (policies)

  10. Software-Defined Networking Policies/signaling Controller Dumb control plane Data plane

  11. The P4 world Upload program Policies/signaling Dumb control plane Programmable data plane SW: P4

  12. Not just for switches! Programmable switches FPGA switches Programmable network cards Software switches Hypervisor switches You name it… Control plane Programmable data plane SW: P4

  13. How is this possible? Datacenter Hello Most useful if you haveyour own network playground ?

  14. Data-planes Control plane Data plane From now on in this presentation we only talk about the data-plane We expect that SDN will continue to evolve the control-plane

  15. WHY SHOULD YOU CARE?

  16. P4.org Consortium Carriers, cloud operators, chip cos, networking, systems, universities, start-ups

  17. Isn’t Open-Flow Enough? Open-Flow version • Open-flow has never been enough: it keeps changing to describe new protocols • Very fragmented

  18. Protocols = programs • VxLAN: 175 lines of P4 • Took 4 years from proposal to wide availability • NVGRE: 183 lines of P4 M. Shahbaz, S. Choi, B. Pfaff, C. Kim, N. Feamster, N. McKeown, J. Rexford, PISCES: A Programmable, Protocol-Independent Software SwitchSIGCOMM 2016 • 40 times reduction in the size of the OvS parser • Much easier to add new protocols • Same performance

  19. Use only what you need IETF has issued thousands of RFCs Switch RAM and CPU is very expensive Network operators can remove protocols Simplertroubleshooting

  20. Network monitoring measurements (custom headers) Monitoring agent In-Band Network Telemetry (INT) Improving Network Monitoring and Managementwith Programmable Data Planes By Mukesh Hira & LJ Wobker

  21. Optimize your network Paxos Made Switch-y Huynh Tu Dang, Marco Canini, Fernando Pedone, Robert Soulé CCR April 2016 Push application functionality in the network High speed

  22. Network = software Use software engineering principles and tools Upgrade your network at any time Protocols = intellectual property

  23. AN INTRODUCTION to P416

  24. Language evolution P4: Programming Protocol-Independent Packet Processors Pat Bosshart, Dan Daly, Glen Gibb, Martin Izzard, Nick McKeown, Jennifer Rexford, Cole Schlesinger, Dan Talayco, Amin Vahdat, George Varghese, David Walker ACM SIGCOMM Computer Communications Review (CCR). Volume 44, Issue #3 (July 2014) P4 v1.0 spec, reference implementation and tools released in Spring 2015 (mostly by Barefoot Networks), Apache 2 license, http://github.com/p4lang. P416 spec, draft reference implementation and tools released in December 2016; spec finalized May 2017; v1.1 in June 2018 http://github.com/p4lang/p4-spec

  25. P4 Community http://github.com/p4lang http://p4.org Free membership! Mailing lists Workshops P4 developer days Academic papers (SIGCOMM, SOSR)

  26. P4 working groups Language design: evolves P4 Control-plane API: defines API between control-plane and P4 program (P4Runtime) Applications: defines interoperable applications (e.g. In-band Network Telemetry) Architecture (Portable Switch Architecture):standardizes portable architecture models Education

  27. Available Software Tools • Compilers for various back-ends • Netronome chip, Barefoot chip, eBPF, Xilinx FPGA (open-source and proprietary) • Multiple control-plane implementations • SAI, OpenFlow, P4Runtime • Simulators • Testing tools • Sample P4 programs • IntelliJ plugin IDE, editor modes • Tutorials

  28. P4 software workflow User-supplied Control-plane API P4 program P4 compiler LOAD API control signals Data plane P4architecture model Dataplaneruntime Tables externobjects LOAD target Manufacturer supplied

  29. P416 • Most recent revision of P4 • C-like syntax; strongly typed • No loops, pointers, recursion, dynamic allocation • Spec: http://github.com/p4lang/p4-spec • Reference compiler implementation(Apache 2 license): http://github.com/p4lang/p4c

  30. P416 Language Overview • Suitable for L2 & 3 • High-level, type, memory-safe (no pointers) • Bounded execution (no loops) • Statically allocated (no malloc, no recursion) • Sub-languages: • Parsing headers • Packet header rewriting • Target architecture description

  31. P416 data plane model Programmableblocks P4 P4 P4 Data plane Fixed function Interfaces

  32. Example packet processing pipeline Programmable parser Headers eth vlan ipv4 Payload Packet (byte[]) Queueing/ switching Programmable match-action units eth ipv4 port mtag err bcast Metadata Not programmable Headers Programmable reassembly eth mtag ipv4 Packet

  33. Language elements Programmable parser State-machine; bitfield extraction Programmable match-action units Table lookup; bitfield manipulation; control flow Programmable reassembly Bitfield packing Bitstrings, headers,structures, arrays Data-types user target Target description Interfaces of programmable blocks External libraries Support for custom accelerators

  34. Basic data types • bit<N>, int<N> • e.g., bit<128>, int<1024> • intis two’s complement • varbit<13> • Container up to specified size; dynamic size is shorter • Only operation is copying • bool • enum, error, match_kind • error { PacketTooShort, ParseError } • error.PacketTooShort • Only string constants supported • typedef

  35. Structures, headers • typedefbit<32> IPv4Address; • header IPv4_h {bit<4> version;bit<4> ihl;bit<8> tos;bit<16> totalLen;bit<16> identification;bit<3> flags;bit<13> fragOffset;bit<8> ttl;bit<8> protocol;bit<16> hdrChecksum; IPv4Address srcAddr; IPv4Address dstAddr;} • // List of all recognized headersstructParsed_packet {Ethernet_hethernet; IPv4_h ip;} header = struct + valid bit

  36. Other derived types • Array of headers • H[6] arr; • Fixed size • Unions of headers • header_unionIP { ipv4 v4header; ipv6 v6header;} • Tuples • tuple<bit<32>, bit<16>> • set<tuple<bit<32>, bit<16>> - implicit only • No recursive types

  37. Expression language • Standard arithmetic/logic on arbitrary bitstrings • But no funky undefined cases like in C • 2s complement for signed values • No division/modulo • Bit-slicing, bit concatenation • Integers are not Booleans • No implicit casts

  38. Extern objects Generic type constructor instantiation • Model hardware accelerators or… • …behaviors not expressible in P4 extern Register<T> { Register(bit<32> size); T read(inbit<32> index);void write(inbit<32> index, in T value);} Register<bit<32>>(1024) reg; • Method calls using copy-in, copy-out • Like Java interfaces

  39. Packets = byte streams • externpacket_in { • void extract<T>(out T headerLvalue);void extract<T>(out T varSizeHdr, inbit<32> varFieldSizeBits); T lookahead<T>();bit<32> length();void advance(inbit<32> bits); } • externpacket_out {void emit<T>(in T hdr);void emit<T>(inbool condition, in T data); }

  40. Parsing = State machines dst src type IP header IP payload ethernet header • parser Parser(packet_in b, outParsed_packet p) {state start {b.extract(p.ethernet);transitionselect(p.ethernet.type) {0x0800: parse_ipv4;default: reject; } } • state parse_ipv4 {b.extract(p.ip);transition accept; }} start parse_ipv4 accept reject Parser states can contain cycles => loops bounded by packet size

  41. Value Sets A set of 32-bit values changed dynamically by the control plane. parser p(packet_in pk, out Headers h) {value_set<bit<32>>(4) vs; state start { pk.extract(h); transition select(h.f) { vs: next; default: reject; } … } }

  42. Actions • ~ Objects with a single method. • Straight-line code. • Reside in tables; invoked automatically on table match. Action data; from control plane • actionSet_nhop(IPv4Address ipv4_dest, PortId port) {nextHop = ipv4_dest;outCtrl.outputPort = port;} classSet_nhop { IPv4Address ipv4_dest; PortId port; void run() { nextHop = ipv4_dest;outCtrl.outputPort = port } } Java/C++ equivalent code.

  43. Tables Map<K, Action> table ipv4_match { key = { headers.ip.dstAddr: exact; } actions = { drop; Set_nhop; }default_action = drop;} Populated bythe control plane

  44. Table = Match-Action Processing Control plane Data action code hit actiondata Execute Lookup Action headers & metadata headers & metadata Lookup key Lookup table Default action

  45. Control-Flow Ipv4_match • control Pipe(inoutParsed_packet headers,inInControlinCtrl,// input portoutOutControloutCtrl) { // output port IPv4Address nextHop; // local variable • actionDrop_action() { … } • actionSet_nhop(…) { … } • table ipv4_match() { … } • … • apply { // body of the pipeline ipv4_match.apply();if (outCtrl.outputPort == DROP_PORT) return; • dmac.apply(nextHop);if (outCtrl.outputPort == DROP_PORT) return; • smac.apply(); }} dmac smac

  46. Packet Construction Convert headers back into a byte stream. Only valid headers are emitted. • control Deparser(inParsed_packet p, packet_out b) {apply {b.emit(p.ethernet); b.emit(p.ip); }}

  47. P4 Program structure #include <core.p4> // core library#include <target.p4> // target description #include "library.p4" // library functions #include "user.p4" // user program

  48. Architecture declaration Provided by the target manufacturer • structinput_metadata{ bit<12> inputPort; } • structoutput_metadata{ bit<12> outputPort; } • parser Parser<H>(packet_in b, out H headers); • control Pipeline<H>(inout H headers, in input_metadata input,out output_metadata output); • control Deparser<H>(in H headers, packet_out p); • package Switch<H>(Parser<H> p, Pipeline<H> p, Deparser<H> d); H = user-specified header type Switch Parser Pipeline Deparser

  49. Support for custom “accelerators” External function External object with methods. Methods can be invoked like functions. Some external objects can be accessed from the control-plane. externbit<32> random(); extern Checksum16 {void clear(); // prepare unit for computationvoid update<T>(in T data); // add data to checksumvoid remove<T>(in T data); // remove data from checksumbit<16> get(); // get the checksum for data added}

  50. Execution model • When a block is invoked (parser, control) it executes to completion on a separate thread • All local variables are thread-local • Only inter-thread communication possible through extern objects and functions • Execution triggered by outside event(e.g., packet arrival) • Actions execute atomically • @atomic annotation

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