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MIPS Data Path Control

MIPS Data Path Control . Ellen Spertus MCS 111 October 25-30, 2001. Review: instruction types. Last time, we looked at components of the data path used by different types of instructions Memory: lw, sw Arithmetic-logical: add, sub, and, or, slt Control flow: beq, jump.

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MIPS Data Path Control

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  1. MIPS Data Path Control Ellen Spertus MCS 111 October 25-30, 2001

  2. Review: instruction types • Last time, we looked at components of the data path used by different types of instructions • Memory: lw, sw • Arithmetic-logical: add, sub, and, or, slt • Control flow: beq, jump

  3. Review: data path components • Program counter (PC) • Instruction memory • Register file • ALU • Data memory

  4. Plan • Today • MIPS instruction formats • MIPS control signals • Next time • Going from instructions to control signals

  5. Data path with control signals

  6. Encoding: r-type • Register-type instructions • Example: add$r1, $r2, $r3 000000 000100001100001 00000 100000 op rsrt rd shamt funct • Can you guess what the field names stand for?

  7. Practice • or $r4, $r20, $r16 op rs rt rd shamt funct • sub $r2, $r1, $r3 op rs rt rd shamt funct

  8. Encoding: i-type (lw, sw) • Immediate-type instructions • Example: addi $r1, $r0, 15 • Examples: lw$r5, 0x3000($r2) sw$r5, 0x3000($r2) • Is rt a source or a destination?

  9. Encoding: i-type (beq) 200:beq$r1, $r0, 0x212 204: add $r3, $r1, $r0 208: beq $r3, $r4, 204 212: add $r2, $r4, $r3

  10. Encoding: j-type • Jump-type instructions • Example: j 0x1208 • Practice: j 0x2348  

  11. op rs rt rd shamt funct R I J op rs rt 16 bit address op 26 bit address Encoding summary Three instruction formats • r-type (register) • i-type (immediate) • j-type (jump)

  12. Data path with control unit

  13. Steps in r-type execution • Fetch instruction from instruction memory • Read registers from register file • ALU operation • Write the result back

  14. Step 1: fetch instruction

  15. Step 2: read registers

  16. Step 3: ALU

  17. Step 4: write result back

  18. Steps in i-type execution (sw) • Fetch instruction from instruction memory • Read registers from register file • ALU operation • Write the result

  19. Step 1: fetch instruction

  20. Step 2: read registers

  21. Step 3: ALU

  22. Step 4: write result back

  23. The effect of each control signal Note that Figure 5.18 (p. 359) gets some of these wrong!

  24. Control signals

  25. Big picture • We want to be able to use the same hardware to interpret different types of instructions • Control signals allow this, by • controlling which path of a multiplexer is enabled • controlling whether writes are performed • controlling ALU behavior

  26. ALU control • How is it done on Mite? • MIPS: • R-type instructions: • lw instructions: • sw instructions: • beq instructions:

  27. ALUOp

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