1 / 70

Chapter 5

Chapter 5. Computer Organization. O BJECTIVES. List the functionality of each component. Understand memory addressing and calculate the number of bytes for a specified purpose. Distinguish between different types of memories. Understand how each input/output device works.

shad-stephenson
Télécharger la présentation

Chapter 5

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Chapter 5 Computer Organization

  2. OBJECTIVES List the functionality of each component. Understand memory addressing and calculate the number ofbytes for a specified purpose. Distinguish between different types of memories. Understand how each input/output device works. Distinguish between the three components of a computer hardware. After reading this chapter, the reader should be able to: Continued on the next slide

  3. OBJECTIVES (continued) Understand the addressing system for input/outputdevices. Understand the program execution and machine cycles. Distinguish between programmed I/O, interrupt-drivenI/O and direct memory access (DMA). Understand the two major architectures used to define the instruction sets of a computer: CISC and RISC. Understand the systems used to connect different components together.

  4. Figure 5-1 Computer hardware (subsystems)

  5. 5.1 CENTRAL PROCESSING UNIT(CPU)

  6. Figure 5-2 CPU • CPU performs operations on data. • ALU • Control Unit • A set of registers

  7. Arithmetic operations: Increment Decrement Add Subtract Multiply Divide Logical operations: NOT AND OR XOR ALU

  8. Fast stand-alone storage locations that hold data temporarily in CPU. PC (Program Counter) Keep track of the instruction currently being executed. Incremented after execution of the instruction. Instruction Register Store the instruction currently being executed Data Registers Hold data before it can be processed Registers

  9. A, special, high-speed storage area within the CPU. All data must be represented in a register before it can be processed. For example, if two numbers are to be multiplied, both numbers must be in registers, and the result is also placed in a register. The power and speed of a CPU determined by the number of registers that a CPU has and the size of each (number of bits) For example a 32-bit CPU is one in which each register is 32 bits wide. Therefore, each CPU instruction can manipulate 32 bits of data. Register

  10. Like the part of the human brain that control the operation of each part of the body. Controlling is achieved through wires (form Control unit to ALU) that can be on/off. 4 wires16 operations Control Unit

  11. I ← M[PC] PC++ R1 ← A R2 ← B R3 ← R1 + R2 C ← R3 • I ← M[PC] • PC++ • . • . • . 10 20 30 CA+B ADD 2000

  12. 5.2 MAIN MEMORY

  13. Main memory – a collection of storage locations, each with a unique identifier called the address. Word- Data are transferred to and from memory in groups of bits called words. The number of bits that can be stored in one CPU register in a computer. Main Memory

  14. Figure 5-3 Main memory

  15. Although programmers use a name to identify a word, at the hardware level, each word is identified by an address. Address space - The total number of uniquely identifiablelocations in memory. For example:a memory with 64KB and a word size of 1 byte has an address space that range from 0 to 65535. Address Space

  16. Table 5.1 Memory units Unit------------ KB-kilobyte MB-megabyte GB-gigabyte TB-terabyte PB-petabyte EB-exabyte Exact Number of bytes------------------------ 210 bytes 220 bytes 230 bytes 240 bytes 250 bytes 260 bytes Approximation------------ 103 bytes 106 bytes 109 bytes 1012 bytes 1015 bytes 1018 bytes

  17. Because computers operate by storing numbers as bit patterns, the address itself is also represented as a bit pattern. If a computer has N words of memory, you need an unsigned integer of size log2N bits to refer to each memory location. Address as Bit Pattern Note: Memory addresses are defined usingunsigned binary integers.

  18. Example 1 A computer has 32 MB (megabytes) of memory. How many bits are needed to address any single byte in memory? Solution The memory address space is 32 MB, or 225 (25 x 220). This means you needlog2 225 or 25 bits, to address each byte.

  19. Example 2 A computer has 128 MB of memory. Each word in this computer is 8 bytes. How many bits are needed to address any single word in memory? Solution The memory address space is 128 MB, which means 227. However, each word is 8 (23) bytes, which means that you have 224 words. This means you need log2 224 or 24 bits, to address each word.

  20. RAM (Random Access Memory) Volatile R/W by user Two categories: DRAM(Dynamic RAM) Refresh used in most PCs SRAM(Static RAM) No refresh faster 、more reliable more expensive often used only as a memory cache Memory Types

  21. ROM (Read Only Memory) Nonvolatile Written by manufacture Hold the booting program Categories: ROM PROM(Programmable ROM)- Write once by user EPROM(Erasable PROM)- physical removal and reinstallation by special device EEPROM(Electronically EPROM)- without being removed from computer Memory Types

  22. Figure 5-4 Memory hierarchy Speed Cost Space Secondary Memory

  23. Cache Memory • Cache memory at any time contains a copy of a portion of main memory. • CPU checks the cache • If exist, copy the word,otherwise • access main memory and copy a block of memorystarting with the desired word. • CPU accesses cache and copies the word. Figure 5-5

  24. It is very probable that the CPU, in next cycle, needs to access the words following the first word. The existence of the cache speeds processing. 80-20 ruleMost computers typically spend 80% of the time accessing only 20% of the data. Same data are accessed over and over again. Cache

  25. 5.3 INPUT / OUTPUT

  26. I/O subsystem allows a computer to Communicate with the outside world Store programs and dataeven when the power is off. Input/Output Subsystem

  27. allows the CPU/memory to communicate with the outside world Keyboard – provides input Monitor display output Echoes the input typed on the keyboard Printer Nonstorage devices

  28. can store large amount of information to be retrieved at a later time. Cheaper than main memory Nonvolatile Auxiliary storage device (Secondary memory) Categories: Magnetic optical Storage devices

  29. Use magnetization to store bits of data If a spot is magnetized1 If a spot is not magnetized0 Magnetic Disk Random access device Magnetic Tape Sequential access device Magnetic Storage devices

  30. Physical layout of a magnetic disk • Performance depends on several factors • Rotational speed • Seek time – the time to move the R/W head to desired track • Transfer time – the time to move data from the disk to the CPU/Memory Figure 5-6

  31. Surface organization of a disk • Each surface is divided into tracks • Each track is divided into sectors • Sector-the smallest storage area that can be accessed at one time. • Block-can be stored in one or more sectors and retrieved together. Figure 5-7

  32. Figure 5-8 Mechanical configuration of a tape

  33. Surface organization of a tape • Sequential access • Slower • Cheaper • Backup large amount of data • 9 vertical spots • 8 bits of information • 1 bit for error detection Figure 5-9

  34. Use light (laser) to store and retrieve data. CD-ROM(Compact disc read-only memory) Same technology as CD CD-R (Compact disc recordable) WORM(Write Once, Read Many) CD-RW (Compact disc rewritable) Also called Erasable optical disc DVD(Digital Versatile Disc) Higher capacity Optical Storage devices

  35. CD (Compact Disc) 讀取CD的雷射光-美國貝爾實驗室的發明 新力(SONY)與飛利浦(Philips)合作研發 新力總裁大賀典雄-所定下直徑12公分、錄音時間74分42秒的版本。 錄音長度剛好可以完整收錄貝多芬的第九號交響曲「合唱」(終樂章:「快樂頌」) 74分42秒

  36. Figure 5-10 Creation and use of CD-ROM

  37. Table 5.2 CD-ROM speeds Speed ------------ 1x 2x 4x 6x 8x 12x 16x 24x 32x 40x 52X Data Rate------------------------ 153,600 bytes per second 307,200bytes per second 614,400bytes per second 921,600bytes per second 1,228,800bytes per second 1,843,200bytes per second 2,457,600 bytes per second 3,688,400bytes per second 4,915,200 bytes per second 6,144,000 bytes per second Approximation------------ 150 KB/s 300 KB/s 600 KB/s 900 KB/s 1.2 MB/s 1.8 MB/s 2.4 MB/s 3.6 MB/s 4.8 MB/s 6 MB/s 7.8 MB/s

  38. Figure 5-11 CD-ROM format

  39. Figure 5-12 Making a CD-R

  40. Figure 5-13 Making a CD-RW

  41. Table 5.3 DVD capacities Feature--------------------------------- single-sided, single-layer single-sided, dual-layer double-sided, single-layer double-sided, dual-layer Capacity------------ 4.7 GB 8.5 GB 9.4 GB 17 GB

  42. Secondary Memory Memory hierarchy Speed Cost Space • Hard disk • Floppy disk (Diskette) • Flash memory • CD-R/CD-RW/DVD • Magnetic tape

  43. 5.4 SUBSYSTEM INTERCONNECTION

  44. Connecting CPU and memory using three buses • Data bus-# of wires depends on the size of the word. • Address bus-# of wires depends on the address space of memory. • Control bus-# of wires depends on the total number of control commands a computer needs. Figure 5-14

  45. The CPU and memory are electronic devices. The I/O devices are eletromechanical, magnetic, or optical devices. Much slower speed Need for an intermediary- I/O controller (or interface) Serial controller-only one wire connection to the device Parallel controller-several connections to the device Connecting I/O devices

  46. Figure 5-15 Connecting I/O devices to the buses

  47. SCSI controller • SCSI(Small Computer System Interface) • Parallel (8/16/32 bits) • Daisy chained connection • Unique ID for each device Figure 5-16

  48. FireWire controller • IEEE 1394 (iLink) • serial • High speed up to 50MB/sec (400Mbps) • Daisy-chain/Tree connection • 1394b (800Mbps) Figure 5-17

  49. USB controller • USB(Universal Serial Bus) • serial • 1.0 (12 Mbps) • 2.0 (480 Mbps) Figure 5-18

  50. The CPU use the same bus to R/W memory and I/O devices. The only difference is the instruction. Two methods to handle the addressing of I/O devices Isolated I/O Memory-Mapped I/O Addressing I/O devices

More Related