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Survey of Performance Analysis on Banyan Networks

Survey of Performance Analysis on Banyan Networks. Written By Nathan D. Truhan Kent State University. Outline. Introduction & Banyan Networks Replicated & Dilated Banyan Networks Plane Interconnected Parallel Network Buffered Banyan Network Output-buffered Banyan Network

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Survey of Performance Analysis on Banyan Networks

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  1. Survey of Performance Analysis on Banyan Networks Written By Nathan D. Truhan Kent State University

  2. Outline • Introduction & Banyan Networks • Replicated & Dilated Banyan Networks • Plane Interconnected Parallel Network • Buffered Banyan Network • Output-buffered Banyan Network • Input-buffered Banyan Network • Conclusions • References

  3. Introduction & Banyan Networks • Banyan networks have been a topic of discussion in high-speed networks due to its low cost and simple implementation • Belongs to a family of multistage interconnection networks which also include Omega, Shuffle-exchange, and others

  4. Introduction & Banyan Networks • Has the properties of having a unique path from source to destination, constructed out of m-stages of uniform switches, self-routing, modular, having a constant delay for all input-output port pairs, in-order delivery of packets

  5. Introduction & Banyan Networks • Consists of O(N log N) switching elements, split into O(log N) stages • Standard Banyan has no buffers • Will concentrate on 2 x 2 switches [1]

  6. Replicated & Dilated Banyan Networks • Expands a Banyan network by adding switching elements or links • A Replicated Banyan network adds d copies of the Banyan network connected by a multiplexer and de-multiplexer

  7. Replicated & Dilated Banyan Networks • When a packet enters the network at the input port I, a layer in d is chosen and the packet is routed to this layer • Layers in a replicated Banyan network are selected in one of three methods - Random, round robin and network load

  8. Replicated & Dilated Banyan Networks [2]

  9. Replicated & Dilated Banyan Networks • Once a packet has traversed its assigned layer it reaches the output de-multiplexer • The de-multiplexers can take packets in two ways - Multiple and single acceptance • One adverse side-effect is that the Banyan network could lose its in-order delivery of packets

  10. Replicated & Dilated Banyan Networks • Can force all packets in same connection to same layer • Can be more expensive to deploy, having an O(d x (N log N)), where d is number of layers in the network

  11. Replicated & Dilated Banyan Networks • Can compromise between standard Banyan and replicated Banyan by using partially replicated networks • Replication occurs only in layers that see congestion

  12. Replicated & Dilated Banyan Networks [2]

  13. Replicated & Dilated Banyan Networks Throughput of replicated Banyan network [2]

  14. Replicated & Dilated Banyan Networks Delay of replicated Banyan network [2]

  15. Replicated & Dilated Banyan Networks • A Dilated Banyan network adds d lines to each port to allow multiple packets to flow between switching elements at the same time which results in 2d x 2d switching elements • It has also been shown in Architecture and Performance Analysis of DIRSMIN [8] that to meet the low-latency and high performance requirement, d = log log N dilation is optimal.

  16. Replicated & Dilated Banyan Networks [3]

  17. Plane Interconnected Parallel Network • Introduced by Moustafa Youssef, Mohamed El-Derini and Hussien Aly from Alexandria University [4] • Standard PIPN network created as split Banyan network with two sub-networks of size N/2 x N/2 and n – 1 stages • Non uniform traffic throughput is measured with [4]:

  18. Plane Interconnected Parallel Network [4]

  19. Plane Interconnected Parallel Network • Can use features of replication and dilation of Banyan networks [4]

  20. Plane Interconnected Parallel Network [4]

  21. Plane Interconnected Parallel Network • Performance in a dilated PIPN network can be shown with dilation 2 and 4 [4]

  22. Outline • Introduction & Banyan Networks • Replicated & Dilated Banyan Networks • Plane Interconnected Parallel Network • Buffered Banyan Network • Output-buffered Banyan Network • Input-buffered Banyan Network • Conclusions • References

  23. Buffered Banyan Network • Most common method to deal with contention is add a queue to some location in the switching element [5]

  24. Buffered Banyan Network • Queues can be placed at the input or output buffers and will have an impact on the performance on the network [5]

  25. Buffered Banyan Network • Cannot completely remove contention, since if packets are headed to the same queue we still have contention • Contended packets are not dropped, but held in the buffer until it can be transmitted, unless the buffer is full

  26. Buffered Banyan Network [7]

  27. Buffered Banyan Network • Processing a network buffer occurs in a two stage clock cycle • At time 0, the network is empty • In the first cycle the network checks for availability of free queue slot to transfer the head-of-line slot packet • In the second cycle the routing of the HOL packet occurs

  28. Buffered Banyan Network • Buffers based off of a three-stage Markovian model [6] to show state of head-of-line packet • State “e” is empty, no packets in buffer • State “n” denotes new packet which is different from previous cycle • State “b” denotes packet in buffer is same as last cycle and was blocked

  29. Buffered Banyan Network • At the beginning of an operation cycle a buffer in stage k, may be in (2B + 1) possible combinations of states, where , and B is the number of buffers in the queue: • [5] • The last stage, m, is special as it cannot be in state b, therefore it only has (B + 1) states, giving us the following: • [5]

  30. Buffered Banyan Network • if two packets are contending for the same input of the switching element in the next stage, but are destined for two separate outputs, with input buffering they would contend and cause congestion • however with output queuing they would be permitted to enter the next stage and be placed in their separate output queues

  31. Output-buffered Banyan Network • Output-buffered Banyan has extra buffer stage at the inputs, while the rest reside at the outputs of the switching elements • This leads to having m + 1 stages considering queuing

  32. Output-buffered Banyan Network • Performance is modeled similar to dilated PIPN network [5]

  33. Input-buffered Banyan Network • Unlike output-buffered network, all queues are at the inputs • This leads to having exactly m stages

  34. Input-buffered Banyan Network [6]

  35. Outline • Introduction & Banyan Networks • Replicated & Dilated Banyan Networks • Plane Interconnected Parallel Network • Buffered Banyan Network • Output-buffered Banyan Network • Input-buffered Banyan Network • Conclusions • Questions • References

  36. Conclusions • In this survey paper we have looked at several methods to improve a Banyan network • Dilating and replication provide marginal increases as well as the PIPN network which combines these methods. The main problem with these designs is the lack of buffer, which still causes contention to occur and packets to be lost • This contention problem is greatly reduced by adding buffers to the network, be it one buffer slot or multiple. There is not a foolproof way to eliminate contention because adding buffers may also add congestion • All methods shown provide a marginal difference in performance, and even through they take different approaches to enhancing performance they are have all similar results, as demonstrated in the figures above

  37. Questions?

  38. References [1] C. Bouras, C. Gkantsidis. Cost of implementing Banyan networks for use in ATM switching fabrics. <http://www.cc.gatech.edu/people/home/gantsich/Other/CostOfImplementingBanyanNetworksForUseInATMSwitchingFabrics.pdf> [2] D. Tutsch, G. Hommel. Multilayer Multistage Interconnection Networks <http://pdv.cs.tu-berlin.de/~dietmart/Publications/DASD2003.pdf> [3] M. Youssef, M. El-Derini, H. Aly. Performance Enhancement Techniques of a Banyan Network Based Interconnection Structure. 1999. <http://www.cs.umd.edu/~moustafa/papers/aej99.pdf> [4] A. Somani, T. Zhang. Architecture and Performance Analysis of DIRSMIN: A Fault-Tolerant Switch using Dilated Reduced-Stage MIN. 1995. <http://citeseer.ist.psu.edu/607007.html>

  39. References [5] K. Chan, et. al. A Refined Model for Performance Analysis of Output-buffered Banyan Networks.<http://citeseer.ist.psu.edu/234601.html>. [6] K. Chan, K. Yeung, S. Chan. A Refined Model for Performance Analysis of Buffered Banyan Networks with and without Priority Control. In IEICE Transactions, January 1999, Vol.E82-B. <http://citeseer.ist.psu.edu/chan99refined.html>. [7] D. Koppelman. Congested Banyan Network Analysis Using Congested-Queue States amd Neighboring-Queue Effects. 1995. <http://citeseer.ist.psu.edu/30043.html>.

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