Enhancing DSP C6711 Board with USB Host Functionality Through Serial Communication Daughter Board

1. Serial Communication Daughter Board for the DSP C6711 Evaluation Board Part B Final DR Presented by: Reshef Schreiber Itay Leibovitz Instructed by: Eran Segev

2. HARDWARE

3. Board Objectives • The second part of the Serial Communication Board (SCB) project adds USB Host capability to the SCB mezzanine board designed in part I and by that expanding its I/O capabilities • The SCB interfaces mechanically and electrically to the External Memory Interface (EMIF) connectors of the evaluation board • To evaluate the use of the Philips ISP1362 USB controller

4. DSP Evaluation Board

5. SCB Interface SCB Power 3.3 V Power 5 V USB External Memory Interface (EMIF) Interrupts

6. EMIF • The memory signals required for the daughter-card interface connectors are: • Address pins • 7 address signals of the DSP are provided to give the address space to the daughter-card. • Data pins • 16 data signals are provided to facilitate access to memory and parallel peripherals. • Chip Select • CE3 is provided to access individual memory and I/O space. • Byte Enable • BE0, BE1 are used in order to access the 16 bit words out of the 32bit wide words of the DSP.

7. D(0:15) ISP1362 RD WR ADR(1:0) INT1 FPGA BE0,BE1 CS ADR(6:0) CS SCB Block Diagram

8. SCB Main Blocks • Address Decoder: used to bridge between the DSP EMIF and the USB host controller. The FPGA decodes the control signals of the EMIF bus to a simple control line (CS) needed by the USB controller. • USB Host Controller: The USB host functions are controlled using various control registers and status ports. These I/O ports (read and write) are accessed by the DSP using a special “two phase” access.

9. ADDRESS DECODER BE0,BE1 CS ADR(6:0) CS FPGA Main Function

10. FPGA Signal Description

11. Address Decoding (1) • The ISP1362 is made of a Host Controller (HC) and a Device Controller (DC) • The ISP1362 Chip Select (CS) is shared between the HC and the DC • Each Controller has two I/O ports : • Command port • Data port • Access to each of these ports is made by a combination of the following control signals: • A0,A1,CS

12. Address Decoding (2) • The right combination of control signals that will force the CS to Low is: • The absolute addresses of the relevant ports (in the DSP memory space) are defined using the CE programming in the DSP initialization

13. ISP1362

14. ISP1362 Description • The ISP1362 is a single-chip Universal Serial Bus (USB) On-The-Go (OTG) controller integrated with the advanced Philips Slave Host Controller (PSHC) and the Philips ISP1181B Device Controller (DC). • Only the Host Controller is implemented in the SCB. • The ISP1362 has two USB ports: port 1 and port 2. Port 1 can be hardware configured to function as a downstream port, an upstream port or an OTG port, Whereas port 2 can only be used as a downstream port. The SCB uses only the HC port which is port 2. • attributes: • Supports integrated physical 4096 bytes of multi-configuration memory • Supports all four types of USB transfers: control, bulk, interrupt and isochronous • Directly addressable memory architecture; memory can be updated on-the-fly

15. ISP1362 Signal Description

16. PIO interface of the ISP1362

17. PIO Register Access • The ISP1362 has 2 types of registers: • 16 bit registers • 32 bit registers. • The 16 bit registers access is made in 2 stages: • Command stage. • Data stage. • The first stage (command stage) chooses the register address. It is done by simply writing the register’s address to the command port of the HC. • Before continuing to the next stage, CS must be kept inactive (high) for at least 300 ns. • The second (data) stage enables reading/writing to the port defined in the in the command stage. • The 32 bit registers access is made in 3 stages: one command stage and two data stages.

18. Reading 16/32 bits register

19. Writing 16/32 bits register

20. SOFTWARE

21. Software Objectives • The software developed includes the driver for the SCB which provides the card with the basic ability to function as a general USB host. Specific implementations will make use of these functions to build a dedicated driver. • The driver runs on the DSP and serves as the HCD (Host Controller Driver) of the ISP1362.

22. Software Implementation The software consists of 3 main layers: • Main program takes care of initialization of the SCB and the ISP1362. • Functions for reading and writing to the ISP1362’s registers and buffer. These are later used for configuring the ISP1362. • Functions for arranging USB transfers from the attached device.

23. The Main Program Checking Existence of Host Controller • Writing a specific value into a scratch register and reading it. Software Reset • A Software Reset is issued by the HCD. • The buffer memory of the HC is shared by the isochronous, interrupt and control functions. Initiate buffer sizes • Several characterizations of the HC are set by evaluating the ISP1362’s registers. Hardware Configuration Device Connected ? • The HC is generating SOF packets and is ready to operate. Enumeration Operational Mode

24. Interrupts • The ISP1362 HC generates interrupts on several events: • Unrecoverable Error • Frame Number Overflow • Device Connection

25. Philips Transfer Descriptor (PTD) • A PTD is a struct that consists of a PTD header and a payload data. • The PTD provides a communication channel between the HCD and the ISP1362 USB HC. • A PTD header contains information required for data transfer, such as data packet size, transfer status and transfer token types. • Certain fields in the PTD header are used by the HC to inform the HCD about the status of the transfer.

26. PTD Header Settings: • Speed • Low Speed/High Speed • Maximum Packet Size • Endpoint Number • Total Bytes • Token Type • IN/OUT/SETUP • Address

27. PTD Header Status: • Actual Bytes transferred • Active – transfer completed • Completion Code • Success/Failure

28. Enumeration • When a USB device is attached to or removed from the ISP1362, the host uses a process known as bus enumeration to identify and manage the device state changes necessary. • Several functions were written in order to take care of the enumeration process of the device.

29. Auxiliary Functions • make_control_ptd • Constructs the PTD given the relevant parameters passed to it and a pointer. • Send_Control • this function sends out the packet to the device. • polls Active Bit to determine when the transaction is completed. • stores the reply in a dedicated buffer. • Set_Address • assigns a unique address by sending a Set Address request in a containing the new address.

30. Control • The function Get_control is used for getting the Descriptors from the device upon connection. • Device Descriptor • A device descriptor describes general information about a USB device. • Configuration Descriptor • A configuration descriptor describes information about a specific device configuration. all related interface and endpoint descriptors are returned. • Set Configuration • The device is set to its default configuration.

31. The device is now enumerated and ready for data transactions. • For testing, The HCD contains functions for generating a Bulk compatible PTD, and for sending and receiving bulk data transactions.

32. END