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ECE6502 Project Progress Updates

This document outlines the progress on the FPCA (Field-Programmable Computing Architecture) reconfigurability platform, which is adapted from GRLIB by Gaisler, specifically focusing on the LEON3 Processor and its associated components. The report covers aspects including front-end (FE) and processing element (PE) partitioning, core synthesis, and essential libraries like MITLL. Current tasks involve synthesis, verification, behavior testing, and post-synthesis activities along with ongoing place and route efforts. Future considerations in the wish list include SIMD support and ISA changes.

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ECE6502 Project Progress Updates

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  1. ECE6502 Project Progress Updates Puqing Wu Computer Engineering UVA

  2. FPCA Reconfigurability

  3. Platform Adapted from grlib by Gaisler

  4. LEON3Processor FE PE Adapted from grlib by Gaisler

  5. FE-PE Partitioning • FE • Fetch • Decode • PE • Register Assign • Execution • Memory • Exception • Write Back

  6. Partitioned Core Synthesis • MITLL Library • Area • Timing • Power • Gate

  7. Verification • Behavior • Test-bench • Test-program • FPGA – Vertex II • Cadence Ncsim – Leon3mp (generic FPCA implementation) • Post-synthesis • On progress…

  8. Place & Route • On progress…

  9. WISH LIST: SIMD • Base FE/PE Wrapping for replication • ISA change/compiler design/hand coding? • Controller/task manager/FPGA bridging?

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