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This presentation discusses the complex architecture of SPC-II, focusing on ingress and egress management using FPGA (Field-Programmable Gate Array) technology and FPX (Flexible Processing Extension). It includes a detailed analysis of various configurations such as APIC (Advanced Programmable Interrupt Controller) implementations, LC (Layer Control) adjustments, and the challenges and solutions associated with specific IP addresses within the 51.51.51.51 range and beyond. Relevant switching mechanisms and performance metrics are covered, providing a comprehensive understanding of architecture scalability.
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SPC II (with FPX) SPC-II SPC-II Ingress Active Egress Active 51 51 51 51 40-47 40-47 51 51 8 51 50 50 50 50 52-59 52-59 52-59 52-59 64 64 200-231 64 200-2xx 200- 2xx Might be only 1 SPC-II FPGA SPC-II FPGA LC FPX Switch FPX LC
SPC II (with FPX) SPC-II SPC-II 37 116-123 116-123 36 108-115 108-115 35 100-107 100-107 34 76-83 76-83 116-123 37 108-115 36 100-107 35 76-83 34 32 32 SPC-II FPGA SPC-II FPGA LC FPX Switch FPX LC
61 61 60 SPC II (with FPX) SPC-II APIC SPC-II APIC 62 62 84-91 84-91 SPC-II FPGA SPC-II FPGA LC FPX Switch FPX LC
SPC II (with FPX) SPC-II APIC SPC-II APIC 142+(3*N) 0x321 33 140+(3*N) 141+(3*N) 142+(3*N) 142+(3*N) SPC-II FPGA SPC-II FPGA LC FPX Switch FPX LC
SPC II (without FPX) SPC-II APIC SPC-II APIC 50,52-59 50,52-59 61 40-47 40-47 51 61 50, 52-59 60 51 50, 52-59 50, 52-59 116-123 37 116-123 108-115 36 108-115 100-107 35 100-107 76-83 34 76-83 32 32 SPC-II FPGA SPC-II FPGA LC FPX Switch FPX LC
SPC II (without FPX) SPC-II APIC SPC-II APIC 62 62 84-91 84-91 SPC-II FPGA SPC-II FPGA LC FPX Switch FPX LC
SPC II (without FPX) SPC-II APIC SPC-II APIC 142+(3*N) 0x321 33 140+(3*N) 141+(3*N) 142+(3*N) 142+(3*N) SPC-II FPGA SPC-II FPGA LC FPX Switch FPX LC
SPC II (without FPX) SPC-II APIC SPC-II APIC 200-2xx 200-2xx 200-2xx 200-2xx SPC-II FPGA SPC-II FPGA LC FPX Switch FPX LC