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Addressing Modes

Addressing Modes. Prima Dewi Purnamasari Microprocessor Electrical Engineering Department Universitas Indonesia. Data addressing modes. 2. Data Addressing Modes. Register addressing: MOV CX,DX or MOV ECX,EDX Immediate addressing: MOV AL,22H or MOV EAX,12345678H

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Addressing Modes

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  1. Addressing Modes Prima DewiPurnamasari Microprocessor Electrical Engineering Department Universitas Indonesia

  2. Data addressing modes Microprocessor (c) Prima Dewi Purnamasari 2011 2

  3. Data Addressing Modes Microprocessor (c) Prima Dewi Purnamasari 2011 • Register addressing: MOV CX,DX or MOV ECX,EDX • Immediate addressing: MOV AL,22H or MOV EAX,12345678H • Direct addressing: MOV CX,LIST 3

  4. Data Addressing Modes (cont’d) Microprocessor (c) Prima Dewi Purnamasari 2011 • Register Indirect addressing: MOV AX,[BX] • Base-plus-index adressing: MOV [BX+DI], CL MOV [EAX+EBX],CL • Register relative addressing: MOV AX,[BX+4] MOV AX,ARRAY[BX] 4

  5. Data Addressing Modes (cont’d) Microprocessor (c) Prima Dewi Purnamasari 2011 Base relative-plus-index addressing: MOV AX,ARRAY[BX+DI] MOV AX,[BX+DI+4] Scaled-index addressing: MOV EDX,[EAX+4*EBX] 5

  6. Microprocessor (c) Prima Dewi Purnamasari 2011 6

  7. Register Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • It is the most common form and is the easiest to apply • Microprocessor contains 8-bit, 16-bit, 32-bit registers • Never mix an 8-bit register with a 16-bit register, 16-bit register with a 32-bit register, etc., because this results in an error when assembled 7

  8. Example of register-addressed instructions Microprocessor (c) Prima Dewi Purnamasari 2011 8

  9. Example: MOV BX,CX Microprocessor (c) Prima Dewi Purnamasari 2011 9

  10. Register Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 Example 3.1 shows a sequence of assembled instructions that copy various data between 8-, 16-, and 32-bit registers 10

  11. Microprocessor (c) Prima Dewi Purnamasari 2011 11

  12. Immediate Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • The term immediate implies that the data immediately follow the hexadecimal opcode in the memory • Immediate are constant data • The MOV immediate instruction transfers a copy of the immediate data into a register or a memory location • Fig.3.4 shows the source data (sometimes preceded by #) overwrite the destination data • The instruction copies the 3456H into register AX 12

  13. Microprocessor (c) Prima Dewi Purnamasari 2011 13

  14. Immediate Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 Example 3.2 shows various immediate instructions in a short program that places a 0000H into the 16-bit registers AX, BX, CX 14

  15. Microprocessor (c) Prima Dewi Purnamasari 2011 15

  16. Direct Data Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • Two basic forms of direct data addressing: • direct addressing, which applies to a MOV between a memory location and accumulator (AL, AX or EAX) • displacement addressing, which applies to almost any instruction in the instruction set • Direct Addressing: MOV AL,DATA (Fig.3.5) • Table 3.3 lists the three direct addressed instruction • A MOV instruction is 3-byte long instruction 16

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  19. Direct Data Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • Displacement Addressing: MOV CL,DATA • almost identical with direct addressing except that the instruction is four bytes wide 19

  20. Register Indirect Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • It allows data to be addressed at any memory location through an offset address held in any of the following register: BP, BX, DI, and SI • MOV AX,[BX] Fig.3.6 • Data segment is used by default with register indirect addressing or any other addressing mode that uses BX, DI, or SI to address memory • If register BP addresses memory, the stack segment is used by default 20

  21. Microprocessor (c) Prima Dewi Purnamasari 2011 21

  22. Register Indirect Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • Sometimes, indirect addressing requires specifying the size of the data with the special assembler directive BYTE PTR, WORD PTR or DWORD PTR • These indicate the size of the memory data addressed by the memory pointer (PTR) • Indirect addressing allows a program to refer to a tabular data located in the memory system (Fig.3.7 & Example 3.6) 22

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  25. .model small .data datas dw 10 dup (?) .code .startup mov ax,1234h mov bx,offset datas mov cx,10 again: mov [bx],ax inc ax inc bx inc bx loop again .exit end Microprocessor (c) Prima Dewi Purnamasari 2011

  26. Base-Plus-Index Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • It indirectly addresses memory data • In 8086 - 80286, this use a base register (BP or BX, holds the beginning location of a memory array) and an index register (DI or SI, ) to indirectly addresses memory • In 80386 and above, this type of addressing allows the combination of any two 32-bit extended registers except ESP • MOV DL, [EAX+EBX] • Figure 3.8 shows the sample instruction of locating data with this scheme 26

  27. Microprocessor (c) Prima Dewi Purnamasari 2011 27

  28. Base-Plus-Index Addressing (cont’d) Microprocessor (c) Prima Dewi Purnamasari 2011 • The major use of this type of addressing is to address elements in a memory array • Fig.3.9 shows the use of BX (base) and DI (index) to access an element in an array of data) • Study Table 3.6 and Example 3.7 as well 28

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  32. Register Relative Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • In its, the data in a segment of memory are addressed by adding the displacement to the contents of a base or an index register (BP, BX, DI, or SI) • Fig.3.10 shows the operation of the MOV AX,[BX+ 1000H] instruction • The displacement can be a number added to the register within the [ ], as in MOV AL,[DI+2], or it can be a displacement subtracted from the register, as in MOV AL,[SI-1] 32

  33. Microprocessor (c) Prima Dewi Purnamasari 2011 33

  34. Register Relative Addressing (cont’d) Microprocessor (c) Prima Dewi Purnamasari 2011 • It is possible to address array data with register relative addressing such as one does with base-plus-index addressing • See Fig.3.11 and study the example 3.8 34

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  37. Base Relative-Plus-Index Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • This mode often addresses a two-dimensional array of memory data • It is the least-used addressing mode (i.e., too complex for frequent use in a program) • Fig.3.12 shows how the instruction MOV AX, [BX+SI+100H] 37

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  39. Microprocessor (c) Prima Dewi Purnamasari 2011 • Addressing arrays with base relative-plus-index addressing • the displacement addresses the file • the base register addresses a record • the index register addresses an element of a record • Study Example 3.9 and Fig.3.13 39

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  42. Scaled-Index Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • This type of addressing is unique to the 80386 - Pentium Pro • It uses two 32-bit registers (a base register and an index register) to access the memory • The second register (index) is multiplied by a scaling factor (either 1X, 2X, 4X, or 8X) • MOV AX,[EDI+2*ECX] • See Example 3.10 and Table 3.9 42

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  45. Data Structures Microprocessor (c) Prima Dewi Purnamasari 2011 • A data structure is used to specify how information is stored in a memory array; it can be quite useful with application that use arrays • The start of a structure is identified with the STRUC directive and ended with the ENDS • See Example 3.11 45

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  48. Microprocessor (c) Prima Dewi Purnamasari 2011 When data are addressed in a structure, use the structure name and the field name to select a field from the structure (Example 3.12) 48

  49. Microprocessor (c) Prima Dewi Purnamasari 2011 49

  50. Program Memory Addressing Microprocessor (c) Prima Dewi Purnamasari 2011 • Program memory-addressing modes (JMP and CALL) consist of three distinct forms: direct, relative, and indirect • Direct Program Memory Addressing • The instruction store the address with the op-code • See Fig.3.14 • It is called a far jump because it can jump to any memory location for the next instruction 50

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