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CDCE62005 Pico BTS/Data Com Clock 3:5 Frequency Synthesizer/Jitter Cleaner

Input frequencies from 3MHz to 500MHz Crystal Inputs from 2MHz to 42MHz Output frequencies from 4.25MHz to 1.175GHz Output up to 5 LVPECL/5 LVDS/10 LVCMOS Individual phase adjust Optional high swing LVPECL mode Wide-range integer divide selectable by output

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CDCE62005 Pico BTS/Data Com Clock 3:5 Frequency Synthesizer/Jitter Cleaner

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  1. Input frequencies from 3MHz to 500MHz Crystal Inputs from 2MHz to 42MHz Output frequencies from 4.25MHz to1.175GHz Output up to 5 LVPECL/5 LVDS/10 LVCMOS Individual phase adjust Optional high swing LVPECL mode Wide-range integer divide selectable by output Low output skew (~ 20ps, typ) Integrated/External PLL Loop Filter Low jitter (< 1ps RMS) On-chip EEPROM Fully Integrated twin VCOs support wide output frequency range Wide input/output frequency range supports high and low end of frequency standards Selectable input/output standards reduces translation logic Integrated/external loop filter provides flexibility EEPROM saves default start-up settings SPI interface provides in-system programming QFN-48 package, Tem -40 to 85 C Loop Filter LVPECL/LVCMOS/LVDS LVDS/LVPECL/LVCMOS 3.3V PFD Charge Pump 5 Individual Divider Wide Range Integer Phase Adjust Input Divider VCO1 Prescaler VCO2 Crystal/LVCMOS Feedback Divider SPI EEPROM CDCE62005 Pico BTS/Data Com Clock3:5 Frequency Synthesizer/Jitter Cleaner Features Benefits Applications • Wireless BTS (Pico, WiMax cells, Macro Base band) • Data Communications • Medical • Test Equipment • Jitter Cleaners In Design Oct/07 Sampling May/08 In Production Texas Instruments Proprietary **NDA required**

  2. Additive jitter < 100fs, RMS Input/Output frequencies up to 1.5GHz (Pri/Sec) Crystal Inputs from 2MHz to 42MHz Output provides up to 5 LVPECL/5 LVDS/10 LVCMOS or combination Individual phase adjust based on output divides Individual MUX selectable between inputs for each output Wide-range integer divide selectable by output On-chip EEPROM Wide input/output frequency range supports high and low end of frequency standards Selectable input/output standards reduces translation logic EEPROM saves default start-up settings SPI interface provides in-system programming QFN-48 package Industrial Temperature range -40 to 85 C CDCE180053:5 Mixed Mode Clock Buffer w/ Integrated Dividers Features Benefits LVPECL/LVCMOS/LVDS LVDS/LVPECL/LVCMOS Applications 3.3V 5 Individual Divider Wide Range Integer Phase Adjust 5 Individual MUX • Wireless BTS • Data Communications • Medical • Test Equipment • Non-telecom In Design Crystal/LVCMOS SPI EEPROM Oct/07 Sampling May/08 In Production Texas Instruments Proprietary **NDA required**

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