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EE3203 LOGIC CIRCUITS LAB

EE3203 LOGIC CIRCUITS LAB. Prepared by: Prof.Dr. Ertuğrul Eriş. Updated 2: December 2012. CONTENTS. HISTORY OBJECTIVES EXPERIMENTS LAB ACTIVITIES Proteus Discussion On board Realization EXAMS. HISTORY. Logic LABs were part of Logic Circuit I and II courses,

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EE3203 LOGIC CIRCUITS LAB

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  1. EE3203 LOGIC CIRCUITS LAB Prepared by: Prof.Dr. Ertuğrul Eriş Updated 2: December 2012 EE323

  2. CONTENTS • HISTORY • OBJECTIVES • EXPERIMENTS • LAB ACTIVITIES • Proteus • Discussion • On board Realization • EXAMS EE323

  3. HISTORY • Logic LABs were part of Logic Circuit I and II courses, • In the new program, Two Logic circuits I and Logic Circuits II courses are replaced by only one «Logic Design» course. • LAB has become a seperate course but it covers both logic I and II expariments EE323

  4. OBJECTIVES • There are three main objectives • Completion of theoretical and practical knowledge «Discussion session» • Simulation of digital circuits on proteus • Realization of logic circuits on boards in LAB. EE323

  5. EXPERIMENTS • There are 7 experiments • three of them takes two weeks • Discussion and proteus one week • Experiment one week • Other four expeiments takes one week only EE323

  6. LAB ACTIVITIES • Each experiments has three activities • Proteus simulation • Interactive Discussion session • Circuit realization EE323

  7. PROTEUS SIMULATION-1 • PROTEUS DIGIAL SIMULATION TOOLS WILL BE TAUGHT • A PROTEUS SIMULATION WILL BE AVAILABLE ON WEB PAGE IN FOUR DIFFERENT FORMATS • VIDEO • POWER POINT PRESENTATION • WORD DOCUMENT • PROTEUS EE323

  8. PROTEUS SIMULATION-2 • Students are expected to study proteus simulations before coming to LAB by using the documents available on Web page • In LAB proteus session students do the proteus simulation of the experiment circuit, they could ask questions that they don’t understand EE323

  9. DISCUSSION SESSION • Each experiment’s leaflet has some questions • Students are expected to study these question before coming to lab • Discussion session is interactive • Student can ask questions that they couldn’t understand • Student will be asked questions that they studied before coming to LAB EE323

  10. CIRCUIT REALIZATION • STUDENTS DO EXPERIMENTS INDUVIDUALLY • EXPERIMENT CIRCUIT IS REALIZED ON BOARD BY THE STUDENT • THEY COULD GET HELP FROM ASSISTANTS • IF STUDENTS COULD NOT COMPLETE CIRCUIT CONNECTIOS ON TIME, THEY COULD WORK ON ALREADY CONNECTED SEPERATE CIRCUIT TO COMPLETE THEIR EXPERIMENT EE323

  11. EVALUATION EE323

  12. COURSE WEB PAGE • Department WEB page/Undergraduate/New cirriculum • Cilick on the course name, Course WEB page • Midterm exam date • Midterm and final exam weights • The following link will take you to all the available documents • http://web.iku.edu.tr/courses/ee/ee3203/ EE323

  13. COURSE LEARNING OUTCOMES-1 • Set up and analyze combinational circuits which are composed of SSI and MSI components in LAB environment (Experiment 1-4). • Set up and analyze sequential circuits which composed of SSI and MSI components in LAB environment (experiment 5-7). • Use "interactive simulation" tool of the proteus in order to analyze logic circuits. • Use "digital simulation" tool of the proteus in order to analyze logic circuits. • Explain/discuss practical meaning of theoretical terms such as independent input, different inputs, input bit stream, dependent outputs, and output bit stream. • Compare/discuss analog independent sources and digital inputs. EE323

  14. COURSE LEARNING OUTCOMES-2 • Discuss/use propagation delay, response time, working frequency, working speed of a logic circuit. • Discuss/compare various Boolean functions realizations. • Detect/find a faulty component/misconnection by using interactive simulation of proteus. • Determine faulty outputs and find non-faulty outputs in Mealy machines by time diagrams/on Proteus/on circuit set up. • Discuss/compare serial and parallel adders. • Use "Netlist" and "Sub circuit" tools of the proteus. EE323

  15. COURSE ASSESMENT MATRIX http://www.iku.edu.tr/TR/ects_bolum.php?m=1&p=12&f=4&r=0&ders_id=2900&ects=ders_detay&yariyil=3 3 2 1 EE323

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