1 / 7

Space Qualification Test (RTSX-SU)

Space Qualification Test (RTSX-SU). Larry Harzstark The Aerospace Corporation January 18, 2006. Space Qualification. Objective is to expose flight parts to extended life test conditions to obtain long term reliability data. Space Qualification Details.

alayna
Télécharger la présentation

Space Qualification Test (RTSX-SU)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Space Qualification Test(RTSX-SU) Larry Harzstark The Aerospace Corporation January 18, 2006

  2. Space Qualification • Objective is to expose flight parts to extended life test conditions to obtain long term reliability data

  3. Space Qualification Details • 304 RTSX32SU and 154 RTSX72SU life-tested for 6000 hours • Design based on NASA test design but modified to decrease the length of the timing paths • Half the parts are life tested at 125 ºC, with the other half at –55 ºC • VCCI=5.0V, VCCA=2.5V, and undershoot less than 1.5V

  4. Space Qualification Design Summary • Utilization Post-Combiner device utilization: SEQUENTIAL Used: 1080 Total: 1080 (100.00%) COMB Used: 1800 Total: 1800 (100.00%) LOGIC Used: 2880 Total: 2880 (100.00%)(seq+comb) IO w/ Clocks Used: 168 Total: 170(46 CMOS) (47 PCI) (74 TTL) CLOCK Used: 2 Total: 2 HCLOCK Used: 1 Total: 1 • Fan out • 26 nets have fan out of 24 • Timing Analysis • Setup time @ 125 ºC, VCCA = 2.25V, VCCI = 4.5V, -1 grade • I/O clock max frequency = 67 MHz • Array clock max frequency = 85 MHz • Hold time @ -55 ºC, VCCA = 2.75V, VCCI = 5.5V, STD grade • Shortest path has 0.51 ns margin

  5. Space Qualification Fuse Utilization F=> 2540 Antifuse between freeway & output track G=> 0 Antifuse between output track & 2nd, 3rd, & 4th freeway on the net H=> 319 Antifuse between two horizontal tracks V=> 76 Antifuse between two vertical tracks W=> 25 Antifuse between horizontal segment & 2nd freeway on the net(old-style freeway) X=> 4873 Antifuse between horizontal segment & freeway B=> 1130 Antifuse between Local Track and input S=> 1332 Antifuse between output track & input(semi-direct) I=> 10006 Antifuse between horizontal segment & input K=> 1572 Antifuse between input & horizontal NCLK0 or NCLK1, or QCLK 21873 Total Dynamic Antifuses J=> 11299 Antifuse between input & horizontal NVCC or NGND M=> 211 Antifuse for I/O configuration options Q=> 8 Silicon Signature afuse in silicon signature words T=> 0 Antifuse between output track & input that is used early in programming sequence to tieoff floating output track Y=> 1836 Antifuse between horizontal segment & vertical NVCC or NGND Z=> 630 Antifuse between freeway & horizontal NVCC or NGND 13984 Total Static Antifuses 35857 Total Antifuses

  6. Schedules for Space Qualification Life Tests Actel FPGA* *Estimated dates for completion of test or results achieved #fails/total # parts

  7. Summary • Aerospace qualification tests include standard and enhanced algorithms and are on-going out to 6000 hours

More Related