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Evaluation of ACTEL FPGA Products by JAXA

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miller
12 diapositives · 406 Views · Sep 21, 2014

Briefing: Independent NASA Test of RTSX-SU FPGAs. Evaluation of ACTEL FPGA Products by JAXA. February 16 2005 @ NASA GSFC. Norio Nemoto Safety & Mission Assurance Department Institute of Space Technology and Aeronautics Japan Aerospace Exploration Agency (JAXA).

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  1. Briefing: Independent NASA Test of RTSX-SU FPGAs Evaluation of ACTELFPGA Products by JAXA February 16 2005 @ NASA GSFC Norio Nemoto Safety & Mission Assurance Department Institute of Space Technology and Aeronautics Japan Aerospace Exploration Agency (JAXA)

  2. 1. RTSX-S/SX-A used in JAXA projects • H-IIA Rocket : 1 sub-system and 1 A54SX32A :no-fail • M-V Rocket : 2 sub-systems and 6 RT54SX72Ss :no-fail • ETS-VIII : 3 sub-systems and 20 RT54SX32Ss :1 failure • (1 failure (Idd increase) was observed at the electrical test after programming) • SELENE : 4 sub-systems and 44 RT54SX32Ss/72Ss :1 failure • (1 failure (Idd increase) was observed at the electrical test after programming) • INDEX : 1 sub-system and 6 RT54SX32Ss :1 failure • ASTRO-F : 1 sub-system and 6 RT54SX32Ss :no-fail • WINDS : 11 sub-systems and 102 RT54SX32Ss/72Ss • =>before programming except for 1sub-system(5 RT54SX32Ss) and no-fail • KIBO(JEM) : 1 sub-system and 10 RT54SX32Ss/72Ss :4 failures • (4 failures at the Box-level on same FPGA:possibly anti-fuse related failure) • SOLAR-B : 4 sub-systems and 28 RT54SX32Ss :1 failure • (1 failure (Idd increase) was observed at the electrical test after programming) • HTV : 3 sub-systems and 109 RT54SX32Ss/72Ss • MAXI system : 1 sub-system and 19 RT54SX32Ss • =>before programming • GPM/DPR : 3 sub-systems and 78 RT54SX32Ss/72Ss • =>not programmed yet

  3. 2. Evaluation Tests 2.1 Purpose • The evaluation is: • To evaluate the reliability of ACTEL UMC products for space applications. A long-term life test will be conducted for this purpose. • (2)To determine the acceleration factors of the anti-fuse failures with MEC products by performing life tests at high-temperatures and maximum VCCA levels . Those data will give additional confidence for some projects which already integrated MEC products and planning to use “as is” providing PPBI (125deg. C and 240h) had been performed on those FPGAs.

  4. 2. Evaluation Tests (cont.) 2.2 Test Vehicle Design Design Target Maximize anti-fuse usage for effective failure detection -> 4-input AND-OR chains Stable operation for easy failure detection -> The chains are driven by external oscillator Tight timing operation for R cells to detect -> R cells are driven by skewed clocks Easy detection of the failures -> Several identical circuit blocks are instantiated on a chip and outputs are compared with each other for real-time failure detection

  5. 2. Evaluation Tests (cont.) 2.2 Test Vehicle Design (cont.) Comparison of numbers of Anti-fuse used (SX32)

  6. 2. Evaluation Tests (cont.) 2.2 Test Vehicle Design (cont.)

  7. 2. Evaluation Tests (cont.) 2.3 Outline of Evaluation Tests • (1)Long-Term Life Test on UMC products • - Sample device:RTSX32SU • - VCCA :2.50V+a(2.75V:maximum recommended operating voltage) • - Temperature :125 deg. C • (maximum recommended operating temperature) • - Frequency :1-4MHz • (To be consistent with ITT General Test) • - Circuit :Inverter Chains and Shift Registers programmed by • latest algorithm • - Duration :1,000 hours (Failure will be monitored in real time. • Electrical measurements will be made several times • at specified points within and after 1,000hours) • - Sample size :100

  8. 2. Evaluation Tests (cont.) 2.3 Outline of Evaluation Tests (cont. ) • (2) Acceleration Factor Evaluation Test for MEC products • - Sample device:A54SX72A and A54SX32A (MEC products) • - VCCA :2.50V+a(2.75V:maximum recommended operating voltage) • - Temperature and Frequency: • 25 deg. C / 1-4MHz • 70 deg. C / 1-4MHz (Temperature dependence test) • 125 deg. C / 1-4MHz • 25 deg. C / 20-50MHz (Frequency dependence test) • - Circuit :Inverter Chains and Shift Registers programmed by • old algorithm • - Duration :1,000 hours (Failure will be monitored in real time. • Electrical measurements will be made several times • at specified points within and after 1,000hours) • - Sample size : 77(A54SX72A) + 45(A54SX32A）for each test condition

  9. 2. Evaluation Tests (cont.) 2.3 Outline of Evaluation Tests (cont. ) • (3)Thermal Cycling Test • (This test will be performed after the Long-Term Life and Acceleration Factor Tests and ) • -VCCA： 2.50V+a（2.75V:The max. recommended operating voltage） • -Temperature ：-65 to 150deg. C（The max. recommended storage temperature） • -Burn-In ：static • -Cycles ：1,000 cycles（Measurements will be made several times • at specified points within and after 1,000cyc） • -Sample size ：MEC（A54SX72A:77,A54SX32A:45) • UMC(RTSX32SU:90) • (4) Radiation Test（TID) • -VCCA： 2.50V+a（2.75V:The max. recommended operating voltage） • -Temperature ：25deg. C • -Total Dose ：1kGy(Si) • -Sample size ：UMC（RTSX32SU:5） • (5) Radiation Test（SEE) • -VCCA：2.75V（SEL), 2.25V（SEU) • -Temperature ：125deg.C（SEL）, 25deg.C（SEU) • -Criteria ：LET more than 60（MeV/(mg/cm2))（SEL) • LET up to 60（MeV/(mg/cm2))（SEU) • -Sample size ：UMC（RTSX32SU:5)

  10. 3. Schedule FPGA evaluation test schedule is shown in table 2. Table 2 FPGA Evaluation Schedule (Draft)

  11. 4. Expected Achievements The evaluation tests are expected to facilitate the failure investigation and resolution processes in the following areas. 1. Reliability evaluation of UMC products 2. UMC failure rate calculations 3. Reliability evaluation of UMC products 4. Evaluation of UMC radiation hardness 5. Confirmation of the MEC failure mode 6. Determination of the acceleration factors of the known MEC failure 5. Summary JAXA will run tests with UMC and MEC products to evaluate the reliability of flight units that include those devices. To plan and conduct the evaluation activities effectively, it is highly desirable to exchange information on this subject with NASA, ESA and ITT, among other related parties.

  12. End of JAXA