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Lecture 4 section 2.4-??

Lecture 4 section 2.4-??. MIPS Reference Data. Class Participation 1. The following is a MIPS ML instruction: 00000010001100100100000000100000 What AL does it represent? (Use the green sheet to decode it). add $t0, $s1, $s2. b. The following is a MIPS AL instruction:

austin-blankenship
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Lecture 4 section 2.4-??

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  1. Lecture 4 section 2.4-??

  2. MIPS Reference Data

  3. Class Participation 1. • The following is a MIPS ML instruction: • 00000010001100100100000000100000 • What AL does it represent? (Use the green sheet to decode it). add $t0, $s1, $s2 • b. The following is a MIPS AL instruction: add $t0, $s1, $s2 • What is the ML MIPS equivalent? 00000010001100100100000000100000

  4. 000000 10001 10010 01000 00000 100000 op rs rt rd shamt funct Machine Language - Arithmetic Instruction • Instructions, like registers and words of data, are also 32 bits long • Example: add $t0, $s1, $s2 • registers have numbers $t0=$8, $s1=$17, $s2=$18 • Instruction Format: Do you know what the field names stand for?

  5. op rs rt rd shamt funct MIPS Instruction Fields • op • rs • rt • rd • shamt • funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits = 32 bits opcode indicating operation to be performed address of the first register source operand address of the second register source operand the register destination address shift amount (for shift instructions) function code that selects the specific variant of the operation specified in the opcode field

  6. 35 18 8 24 100011 10010 01000 0000000000011000 op rs rt 16 bit number Machine Language - Load Instruction • Consider the load-word and store-word instructions, • What would the regularity principle have us do? • New principle: Good design demands a compromise • Introduce a new type of instruction format • I-type for data transfer instructions • previous format was R-type for register • Example: lw $t0, 24($s2) Where's the compromise?

  7. . . . 1001 0100 + . . . 0001 1000 . . . 1010 1100 = 0x120040ac Memory Address Location • Example: lw $t0, 24($s2) Memory 0xf f f f f f f f 2410 + $s2 = 0x00000002 0x12004094 $s2 0x0000000c Note that the offset can be positive or negative 0x00000008 0x00000004 0x00000000 data word address (hex)

  8. 43 18 8 24 101011 10010 01000 0000000000011000 op rs rt 16 bit number Machine Language - Store Instruction • Example: sw $t0, 24($s2) • A 16-bit address means access is limited to memory locations within a region of 213 or 8,192 words (215 or 32,768 bytes) of the address in the base register $s2

  9. lw 35 19 8 8 sub 0 8 18 8 0 34 sw 43 19 8 32 Assembling Code • Remember the assembler code we compiled for the C statement A[8] = A[2] - b lw $t0, 8($s3) #load A[2] into $t0 sub $t0, $t0, $s2 #subtract b from A[2] sw $t0, 32($s3) #store result in A[8] Assemble the MIPS code for these three instructions

  10. Review: MIPS Data Types Bit: 0, 1 Bit String: sequence of bits of a particular length 4 bits is a nibble 8 bits is a byte 16 bits is a half-word 32 bits is a word 64 bits is a double-word Character: ASCII 7 bit code Decimal: digits 0-9 encoded as 0000b thru 1001b two decimal digits packed per 8 bit byte Integers:2's complement Floating Point

  11. Beyond Numbers • Most computers use 8-bit bytes to represent characters with the American Std Code for Info Interchange (ASCII) • So, we need instructions to move bytes around

  12. op rs rt 16 bit number Loading and Storing Bytes • MIPS provides special instructions to move bytes lb $t0, 1($s3) #load byte from memory sb $t0, 6($s3) #store byte to memory • What 8 bits get loaded and stored? • load byte places the byte from memory in the rightmost 8 bits of the destination register • what happens to the other bits in the register? • store byte takes the byte from the rightmost 8 bits of a register and writes it to a byte in memory I

  13. MIPS Reference Data lb – load byte – loads a byte from memory, placing it in the rightmost 8 bits of a register. sb – store byte – takes a byte from the rightmost 8 bits of a register and writes it to memory

  14. Example of Loading and Storing Bytes • Given following code sequence and memory state (contents are given in hexadecimal), what is the state of the memory after executing the code? add $s3, $zero, $zero lb $t0, 1($s3) #lbu $t0, 1($s0)gives sb $t0, 6($s3) #$t0 = 0x00000090 mem(4) = 0xFFFF90FF Memory 0 0 0 0 0 0 0 0 24 Questions 2 : What value is left in $t0? 0 0 0 0 0 0 0 0 20 $t0 = 0xFFFFFF90 0 0 0 0 0 0 0 0 16 1 0 0 0 0 0 1 0 12 Questions 3:What if the machine was little Endian? 0 1 0 0 0 4 0 2 8 F F F F F F F F 4 mem(4) = 0xFF12FFFF $t0 = 0x00000012 0 0 9 0 1 2 A 0 0 Data Word Address (Decimal) * Class Participation

  15. Review: MIPS Instructions, so far

  16. Review: MIPS R3000 ISA • Instruction Categories • Load/Store • Computational • Jump and Branch • Floating Point • coprocessor • Memory Management • Special • 3 Instruction Formats: all 32 bits wide Registers R0 - R31 PC HI LO 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits R format OP rs rd shamt funct rt I format OP rs rt 16 bit number J format 26 bit jump target OP

  17. R-type OP rs rd shft funct rt Register Instructions • Assume: g, h, i, j are stored in registers $s1 - $s4. Result f to be stored in $s0. • Compile: f = (g + h) – (i + j) • into MIPS instructions: • add $t0, $s1, $s2 # register $t0  (g+h) • add $t1, $s3, $s4 # $t1  (i + j) • sub $s0, $t0, $t1 # $s0  $t0 - $t1

  18. 6 5 5 16 I-type OP rs rt const Immediate format • Immediate = small constant stored in the instruction • addi $sp, $sp, const # $sp  $sp + const • Range of constant operand: -215 ≤ const 215-1 • Set on less-then, immediate slti $t0, $s2, const • # $t0  1 if $s2 < const ; 0 otherwise

  19. 8 7 6 5 4 3 2 1 I-type OP rs rt immediate Operand in memory • Let A[ ] = array whose starting (base) address is in $s3; • let variable h be associated with register $s2; • Compile: A[5] = h + A[8] • into MIPS instructions: • lw $t0, 32 ($s3) # $t0  A[8] • add $t0, $s2, $t0 # $t0  h+$t0 • sw $t0, 20 ($s3) # A[5]  $t0 8*4 = 32 bytes (byte-addressable) $s3 5*4 = 20

  20. Array with variable index • A[ ] = array with baseaddress in $s3; • variables g, h, i associated with registers $s1, $s2, $s4 • Compile: g = h + A[i] into MIPS instructions: • add $t1, $s4, $s4 # $t1  i+i = 2i • add $t1, $t1, $t1 # $t1  2i+2i = 4i • add $t1, $t1, $s3 # $t1  address of A[i] • lw $t0, 0 ($t1) # $t0  A[i] • add $s1, $s2, $t0 # $s1  h + A[i]

  21. If statements • Let variables f, g, h, i, j beassociated with $s0 - $s4 • Compile: • if (i == j) go to L1; • f = g + h; • L1: f = f – i; • into MIPS instructions: • Does the following code work? • beq $s3, $s4, L1 # if i = j, go to L1 • add $s0, $s1, $s2 # f = g + h (skipped if i=j) • L1: sub $s0, $s0, $s3 # f = f – i (always executed)

  22. R-type OP rs 0 0 funct 0 J-type OP Label = jump target OP/funct = jr Jump instructions • Regular jump uses J-format • j Label # jump to Label 26 • (the above label is not quite this simple) • jr (jump on register address) uses R-format • jr $t1 # jump to address given in $t1

  23. J-type OP jump target If then else statements • Let variables f, g, h, i, j beassociated with $s0 - $s4 • Compile: • if (i == j) f = g + h; else f = g –h; • into MIPS instructions: • bne $s3, $s4, Else # if i  j, go to Else • add $s0, $s1, $s2 # f = g + h (skipped if i  j) • j Exit # go to Exit • Else: sub $s0, $s1, $s2 # f = g – h (skipped if i = j) • Exit:

  24. Pseudo-instructions • Let variables a, b beassociated with $s0, $s1 • Compile: • if (a < b) go to L • into MIPS instructions: • slt $t0, $s0, $s1 # $t0  1 if $s0 < $s1 (a < b) • bne $t0, $zero, L # if $t0  0, go to L • We can createpseudo-instruction: blt $s0, $s1, L • Special registers, useful in beq, bne, slt: • $zero is a special register, holds 0 • $at is another special register used in the blt pseudo-instruction • It generates the above two instructions with $at replacing $t0

  25. 16 6 5 5 I-type OP rs immediate rt 6 26 J-type OP Large – jump target Branching further away -215 ≤ small constant offset  215-1 • Consider a branch instruction • beq $s0, $s1, L1 # branch to L1 if $s0 = $s1 • If the offset does not fit in the above range the compiler (or programmer) changes it to the following sequence to get a larger distance. • bne $s0, $s1, L2 # branch to L2 if $s0 $s1 • j Large # unconditional jump to “Large” • L2:

  26. 6 5 5 16 I-type OP 0 rt const 16 16 $to: 0000 0000 0000 0000 const 0 31 16 15 Loading large numbers • Instruction lui: load upper immediate • lui $t0, const # $t0[31:16] const

  27. Register (direct) op rs rt rd register • Immediate op rs rt immed • Base+index op rs rt immed Memory + + register op rs rt immed Memory • PC-relative PC MIPS Addressing Modes/Instruction Formats All instructions are 32-bit wide Also there is pseudodirect addressing as is used by jump instructions

  28. Operation Summary Support these simple instructions, since they will dominate the number of instructions executed: load, store, add, subtract, move register-register, and, shift, compare equal, compare not equal, branch, jump, call, return;

  29. Additional MIPS Instructions

  30. MIPS instructions, formats • MIPS instructions: data transfers, arithmetic, logical • Pseudo-instruction example: loading large constant • MIPS register organization • Implementing loops • Implementing switch/case statement • Procedures and subroutines • Stacks and pointers • Running a program • Compiler, Assembler, Linker, Loader

  31. MIPS: Software conventions for registers R0 $zero constant 0 R1 $at reserved for assembler R2 $v0 value registers & R3 $v1 function results R4 $a0arguments R5 $a1 R6 $a2 R7 $a3 R8 $t0temporary: caller saves . . . (callee can clobber) R15 $t7 R16 $s0callee saves . . . (caller can clobber) R23 $s7 R24 $t8temporary (cont’d) R25 $t9 R26 $k0 reserved for OS kernel R27 $k1 R28 $gp pointer to global area R29 $sp Stack pointer R30 $fp Frame pointer R31 $ra return Address

  32. LUI $r5 0000 … 0000 $r5 MIPS data transfer instructions Instruction Comment sw 500($r4), $r3 Store word sh 502($r2), $r3 Store half sb 41($r3), $r2 Store byte lw $r1, 30($r2) Load word lh $r1, 40($r3) Load halfword lhu $r1, 40($r3) Load halfword unsigned lb $r1, 40($r3) Load byte lbu $r1, 40($r3) Load byte unsigned lui $r1, 40 Load Upper Immediate (16 bits shifted left by 16)

  33. 0000 0000 0000 0000 upper 0 31 16 15 0000 0000 0000 0000 lower lower upper Loading large numbers • Pseudo-instruction li $t0, big: load 32-bit constant • lui $t0, upper # $t0[31:16] upper • ori $t0, $t0, lower # $t0  ($t0 Or [0ext.lower]) OR $to: 32-bit constant

  34. Loop with variable array index • Compile the following loop, with A[ ] = array with base address in $s5; variables g, h, i, j associated with registers $s1, $s2, $s3, $s4. • Loop: g = g + A[i]; • i = i + j; • if (i  h) go to Loop; • MIPS instructions: • Loop: add $t1, $s3, $s3 # $t1  i+i = 2i • add $t1, $t1, $t1 # $t1  2i+2i = 4i • add $t1, $t1, $s5 # $t1  address of A[i] • lw $t0, 0 ($t1) # $t0  A[i] • add $s1, $s1, $t0 # $s1  g + A[i] • add $s3, $s3, $s4 # $s3  i + j • bne $s3, $s2, Loop # if (i  h) go to Loop

  35. While loop • Base address of A[i] is in $s6; variables i, j, k arein $s3, $s4, $s5. • Compile the following while loop • while (A[i] == k) • i = i + j; • intoMIPS instructions: • Loop: add $t1, $s3, $s3 # $t1  i+i = 2i • add $t1, $t1, $t1 # $t1  2i+2i = 4i • add $t1, $t1, $s6 # $t1  address of A[i] • lw $t0, 0 ($t1) # $t0  A[i] • bne $t0, $s5, Exit # if (A[I]  k) go to Exit • add $s3, $s3, $s4 # $s3  i + j • j Loop # go to Loop • Exit:

  36. Switch/case statement • Variables f - k arein $s0 - $s5.Register $t2 contains constant 4. • Compile the following switch statementintoMIPS instructions • switch (k) { • case 0: f = i + j; break; /* k=0 */ • case 1: f = g + h; break; /* k=1 */ • case 2: f = g - h; break; /* k=2 */ • case 3: f = i - j; break; /* k=3 */ • } • Use the switch variablek to index the jump address table. • First, test for k, if in correct range (0-3). • slt $t3, $s5, $zero # test if k , 0 • bne $t3, $zero, Exit # if k < 0, go to Exit • slt $t3, $s5, $t2 # test if k < 4 • beq $t3, $zero, Exit # if k  4, go to Exit

  37. Switch statement, cont’d • Access jump table T [ ] with addresses L0,L1,L2,L3: $t4 is address of T • add $t1, $s5, $s5 # $t1  2k • add $t1, $t1, $t1 # $t1  4k • add $t1, $t1, $t4 # $t1  address of T [k] • lw $t0, 0 ($t1) # $t0  T [k] (loads one of L0, L1, L2, L3) • Use jump register instruction to jump via $t0 to the right address • jr $t0 # jump based on register $t0 • L0: add $s0, $s3, $s4 # k = 0, so f=$s0  i + j • j Exit # go to Exit • L1: add $s0, $s1, $s2 # k = 1, so f=$s0  g + h • j Exit # go to Exit • L2: sub $s0, $s1, $s2 # k = 2, so f=$s0  g + h • j Exit # go to Exit • L3: sub $s0, $s3, $s4 # k = 3, so f=$s0  i - j • Exit:

  38. Compiling a leaf procedure (not nested) • int leaf_example (int g, int h, int i, int j) • { int f; • f = (g + h) – (i + j); • return f; • } • Let parameter variables g, h, i, j, correspond to the argument registers $a0, $a1, $a2, $a3. Will use temp. registers $t0= (g + h) and $t1=(i + j). Function f will be stored in $s0. • Steps: • Save the old values of registers ($s0, $t0, $t1) on stack (push) • Issue a jal sub_address instruction ($ra ret_addr, j sub_address) • Perform the computation for $t0, $t1, $s0 using argument registers • Copy the value of f into a return value register $v0 • Restore the old values of the saved registers from stack (pop) • Finally, jump back to the calling routine, jr $ra • (PC  return_address=PC+4)

  39. Compiling a leaf procedure, cont’d • Leaf_example: # label of the procedure • Save the old values of registers ($s0, $t0, $t1) on stack (push) • sub $sp, $sp, 12 # adjust stack to make room for 3 items • sw $t1, 8 ($sp) # save reg $t1 on stack • ……. # repeat for $t0, $s0 • Perform the computation for $t0, $t1, $s0 using argument registers • add $t0, $a0, $a1 # $t0  g + h • add $t1, $a2, $a3 # $t1  i + j • sub $s0, $t0, $t1 # $s0  (g + h) – (i + j) • Copy the value of f into a return value register $v0 • add $v0, $s0, $zero # returns f ($v0  $s0 + 0) • Restore the old values of the saved registers from stack (pop) • lw $s0, 0 ($sp) # restore reg. $s0 for the caller • ……. # repeat for $t0, $t1 … • add $sp, $sp, 12 # adjust the stack to delete 3 items • Finally, jump back to the calling routine (PC  return address) • jr $ra # PC  $ra

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