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Semiconductor Device Modeling and Characterization – EE5342 Lecture 28 – Spring 2011

This lecture delves into the modeling and characterization of 2-terminal MOS capacitors and diodes, focusing on their electrical properties, equivalent circuits, and operational principles. Led by Professor Ronald L. Carter, the discussion covers critical parameters such as flat-band conditions, accumulation, depletion, and inversion regimes in silicon substrates. Key equations governing the behavior of these devices are presented, along with graphical aids to enhance understanding. This valuable resource is designed for students and professionals in electrical engineering and semiconductor physics.

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Semiconductor Device Modeling and Characterization – EE5342 Lecture 28 – Spring 2011

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  1. Semiconductor Device Modeling and Characterization – EE5342 Lecture 28 – Spring 2011 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/

  2. Ideal 2-terminalMOS capacitor/diode conducting gate, area = LW Vgate -xox SiO2 0 y 0 L silicon substrate tsub Vsub x

  3. Band models (approx. scale) metal silicon dioxide p-type s/c Eo Eo qcox ~ 0.95 eV Eo qcSi= 4.05eV qfm= 4.1 eV for Al Ec qfs,p Eg,ox ~ 8 eV Ec EFm EFi EFp Ev Ev

  4. Flat band condition (approx. scale) Al SiO2 p-Si q(fm-cox)= 3.15 eV q(cox-cSi)=3.1eV Ec,Ox qffp= 3.95eV EFm Ec Eg,ox~8eV EFi EFp Ev Ev

  5. Equivalent circuitfor Flat-Band • Surface effect analogous to the extr Debye length = LD,extr = [eVt/(qNa)]1/2 • Debye cap, C’D,extr = eSi/LD,extr • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’D,extr

  6. Accumulation forVgate< VFB Vgate< VFB -xox SiO2 EOx,x<0 0 holes p-type Si tsub Vsub = 0 x

  7. Accumulationp-Si, Vgs < VFB Fig 10.4a*

  8. Equivalent circuitfor accumulation • Accum depth analogous to the accum Debye length = LD,acc = [eVt/(qps)]1/2 • Accum cap, C’acc = eSi/LD,acc • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’acc

  9. Depletion for p-Si, Vgate> VFB Vgate> VFB -xox SiO2 EOx,x> 0 0 Depl Reg Acceptors p-type Si tsub Vsub = 0 x

  10. Depletion forp-Si, Vgate> VFB Fig 10.4b*

  11. Equivalent circuitfor depletion • Depl depth given by the usual formula = xdepl = [2eSi(Vbb)/(qNa)]1/2 • Depl cap, C’depl = eSi/xdepl • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’depl

  12. Inversion for p-SiVgate>VTh>VFB Vgate> VFB EOx,x> 0 e- e- e- e- e- Acceptors Depl Reg Vsub = 0

  13. Inversion for p-SiVgate>VTh>VFB Fig 10.5*

  14. Approximation concept“Onset of Strong Inv” • OSI = Onset of Strong Inversion occurs when ns = Na = ppo and VG= VTh • Assume ns = 0 for VG< VTh • Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh • Cd,min = eSi/xd,max for VG > VTh • Assume ns > 0 for VG > VTh

  15. MOS Bands at OSIp-substr = n-channel Fig 10.9*

  16. Equivalent circuitabove OSI • Depl depth given by the maximum depl = xd,max = [2eSi|2fp|/(qNa)]1/2 • Depl cap, C’d,min = eSi/xd,max • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’d,min

  17. MOS surface states**p- substr = n-channel

  18. n-substr accumulation (p-channel) Fig 10.7a*

  19. n-substrate depletion(p-channel) Fig 10.7b*

  20. n-substrate inversion(p-channel) Fig 10.7*

  21. Values for gate workfunction, fm

  22. Values for fmswith metal gate

  23. Values for fmswith silicon gate

  24. fms (V) Fig 10.15* NB (cm-3) Typical fms values

  25. Flat band with oxidecharge (approx. scale) Al SiO2 p-Si +<--Vox-->- q(Vox) Ec,Ox q(ffp-cox) Ex q(fm-cox) Eg,ox~8eV Ec EFm EFi EFp q(VFB) Ev VFB= VG-VB, when Si bands are flat Ev

  26. Flat-band parametersfor n-channel (p-subst)

  27. Flat-band parametersfor p-channel (n-subst)

  28. Inversion for p-SiVgate>VTh>VFB Vgate> VFB EOx,x> 0 e- e- e- e- e- Acceptors Depl Reg Vsub = 0

  29. Approximation concept“Onset of Strong Inv” • OSI = Onset of Strong Inversion occurs when ns = Na = ppo and VG= VTh • Assume ns = 0 for VG< VTh • Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh • Cd,min = eSi/xd,max for VG > VTh • Assume ns > 0 for VG > VTh

  30. Fig 10.9* qfp 2q|fp| xd,max MOS Bands at OSIp-substr = n-channel

  31. Computing the D.R. W and Q at O.S.I. Ex Emax x

  32. Calculation of thethreshold cond, VT

  33. Equations forVT calculation

  34. Fully biased n-MOScapacitor VG Channel if VG > VT VS VD EOx,x> 0 e- e- e- e- e- e- n+ n+ p-substrate Vsub=VB Depl Reg Acceptors y 0 L

  35. MOS energy bands atSi surface for n-channel Fig 8.10**

  36. Ex Emax x Computing the D.R. W and Q at O.S.I.

  37. Q’d,max and xd,max forbiased MOS capacitor Fig 8.11** xd,max (mm)

  38. Fully biased n-channel VT calc

  39. n-channel VT forVC = VB = 0 Fig 10.20*

  40. References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986

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