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ETE 2 04 - Digital Electronics

ETE 2 04 - Digital Electronics. Flip-Flops and Registers. [Lecture:13] Instructor: Sajib Roy Lecturer, ETE, ULAB. Flip-Flops. (continued). Summer 2012. ETE 204 - Digital Electronics. 2. SR Flip-Flop. ● The SR Flip-Flop has three inputs.

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ETE 2 04 - Digital Electronics

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  1. ETE 204 - Digital Electronics Flip-Flops and Registers [Lecture:13] Instructor: Sajib Roy Lecturer, ETE, ULAB

  2. Flip-Flops (continued) Summer 2012 ETE 204 - Digital Electronics 2

  3. SR Flip-Flop ● The SR Flip-Flop has three inputs - Clock (Ck) --- denoted by the small arrowhead - Set (S) and Reset (R) ● Similar to an SR Latch - S = 1 sets the flip-flop (Q+ = 1) - R = 1 resets the flip-flop (Q+ = 0) ● Like the D Flip-Flop, the Q output of an SR Flip-Floponly changes in response to an active clock edge. - Positive edge-triggered - Negative edge-triggered Summer 2012 ETE 204 - Digital Electronics 3

  4. SR Flip-Flop S R Q Q+ }}} 0 0 0 0 Q+ = Q 0 0 1 1 store 0 1 0 0 Q+ = 0 positive edge-triggered SR Flip-Flop 0 1 1 0 reset 1 01 0 0 11 1 Q+ = 1 set 1 1 0 not 1 1 1 allowed State change occurs after active Clock edge Summer 2012 ETE 204 - Digital Electronics 4

  5. SR Flip-Flop (master-slave) SR Latches Enabled on opposite levels of the clock Summer 2012 ETE 204 - Digital Electronics 5

  6. SR Flip-Flop: Timing Diagram Summer 2012 ETE 204 - Digital Electronics 6

  7. JK Flip-Flop ● The JK Flip-Flop has three inputs - Clock (Ck) --- denoted by the small arrowhead - J and K ● Similar to the SR Flip-Flop - J corresponds to S: J = 1 → Q+ = 1 – K corresponds to R: K = 1 → Q+ = 0 ● Different from the SR Flip-Flop in that the inputcombination J = 1, K = 1 is allowed. - J = K = 1 causes the Q output to toggle after an active clock edge. Summer 2012 ETE 204 - Digital Electronics 7

  8. JK Flip-Flop }}}} Q+ = Q store Q+ = 0 reset Q+ = 1 set Characteristic Equation: Q+ = J.Q' + K'.Q Q+ = Q' toggle Summer 2012 ETE 204 - Digital Electronics 8

  9. JK Flip-Flop (master-slave) SR Latches Enabled on opposite levels of the clock Summer 2012 ETE 204 - Digital Electronics 9

  10. JK Flip-Flop: Timing Diagram Summer 2012 ETE 204 - Digital Electronics 10

  11. T Flip-Flop ● The Toggle (T) Flip-Flop has two inputs - Clock (Ck) --- denoted by the small arrowhead - Toggle (T) ● The T input controls the state change - when T = 0, the state does not change (Q+ = Q) - when T = 1, the state changes following an active clock edge (Q + = Q') ● T Flip-Flops are often used in the design of counters. Summer 2012 ETE 204 - Digital Electronics 11

  12. T Flip-Flop Characteristic Equation: Q+ = T.Q' + T'.Q = T xor Q Summer 2012 ETE 204 - Digital Electronics 12

  13. T Flip-Flop: Timing Diagram Summer 2012 ETE 204 - Digital Electronics 13

  14. Building a T Flip-Flop Summer 2012 ETE 204 - Digital Electronics 14

  15. Asynchronous Control Signals Summer 2012 ETE 204 - Digital Electronics 15

  16. Asynchronous Control Signals: Timing Diagram Summer 2012 ETE 204 - Digital Electronics 16

  17. D FF with Clock Enable Summer 2012 ETE 204 - Digital Electronics 17

  18. Registers Summer 2012 ETE 204 - Digital Electronics 18

  19. Registers Several D flip-flops may be grouped together with a commonclock to form a register. Because each flip-flop can store onebit of information, a register with n D flip-flops can store n bitsof information. A load signal can be ANDed with the clock to enable anddisable loading the registers. A better approach is to use registers with clock enables ifthey are available. Summer 2012 ETE 204 - Digital Electronics 19

  20. Register: 4 bits Summer 2012 ETE 204 - Digital Electronics 20

  21. Data Transfer between Registers ● Data transfer between registers is a commonoperation in computer (i.e. digital) systems. ● Multiple registers can be interconnected usingtri-state buffers. ● Data can be transferred between two registersby enabling the proper tri-state buffer. Summer 2012 ETE 204 - Digital Electronics 21

  22. Data Transfer between Registers Summer 2012 ETE 204 - Digital Electronics 22

  23. Register with Tri-state Output Summer 2012 ETE 204 - Digital Electronics 23

  24. Data Transfer using Tri-state Bus Summer 2012 ETE 204 - Digital Electronics 24

  25. Shift Register A shift register is a register in which binary data can be storedand shifted either left or right. The data is shifted according tothe applied shift signal; often there is a left shift signal and aright shift signal. A shift register must be constructed using flip-flops (i.e. edge-triggered devices); it cannot be constructed using latches orgated-latches (i.e. level-sensitive devices). Summer 2012 ETE 204 - Digital Electronics 25

  26. Shift Register: 4 bits Summer 2012 ETE 204 - Digital Electronics 26

  27. Shift Register (4 bits): Timing Diagram Summer 2012 ETE 204 - Digital Electronics 27

  28. 8-bit SI SO Shift Register Summer 2012 ETE 204 - Digital Electronics 28

  29. 4-bit PIPO Shift Register Summer 2012 ETE 204 - Digital Electronics 29

  30. 4-bit PI PO Shift Register: Operation Summer 2012 ETE 204 - Digital Electronics 30

  31. Parallel Adder with Accumulator Summer 2012 ETE 204 - Digital Electronics 31

  32. Parallel Adder with Accumulator In computer circuits, it is frequently desirable to store onenumber in a register (called an accumulator) and add asecond number to it, leaving the result stored in the register. Summer 2012 ETE 204 - Digital Electronics 32

  33. n-bit Parallel Adder with Accumulator Summer 2012 ETE 204 - Digital Electronics 33

  34. Loading the Accumulator Before addition in the previous circuit can take place, theaccumulator must be loaded with X. This can beaccomplished in several ways. The easiest way is to firstclear the accumulator using the asynchronous clear inputson the flip-flops, and then put the X data on the Y inputs tothe adder and add the accumulator in the normal way. Alternatively, we could add multiplexers at the accumulatorinputs so that we could select either the Y input data or theadder output to load into the accumulator. Summer 2012 ETE 204 - Digital Electronics 34

  35. Adder Cell with Multiplexer Summer 2012 ETE 204 - Digital Electronics 35

  36. Questions? Summer 2012 ETE 204 - Digital Electronics 36

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