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ETE 204 - Digital Electronics

ETE 204 - Digital Electronics. Multiplexers, Decoders and Encoders. [Lecture:10] Instructor: Sajib Roy Lecturer, ETE, ULAB. Multiplexers. ● A multiplexer has. - 2 n data inputs. - n control inputs. - 1 output.

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ETE 204 - Digital Electronics

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  1. ETE 204 - Digital Electronics Multiplexers, Decoders and Encoders [Lecture:10] Instructor: Sajib Roy Lecturer, ETE, ULAB

  2. Multiplexers ● A multiplexer has - 2n data inputs - n control inputs - 1 output ● A multiplexer routes (or connects) the selecteddata input to the output. - The value of the control inputs determines the data input that is selected. Summer2012 ETE 204 - Digital Electronics 2

  3. Multiplexers Data inputs Z = A′.I0 + A.I1 Control input Summer2012 ETE 204 - Digital Electronics 3

  4. Multiplexers A B Z 0 0 I0 0 1 I1 1 0 I2 20 1 1 I 3 21 m0 = A'.B' m1 = A'.B MSB LSB m2 = A.B' m3 = A.B Z = A′.B'.I0 + A'.B.I1 + A.B'.I2 + A.B.I3 Summer2012 ETE 204 - Digital Electronics 4

  5. Multiplexers A B C Z m0 0 0 0 I0 m1 0 0 1 I1 m2 0 1 0 I2 m3 0 1 1 I3 m4 1 0 0 I4 m5 1 0 1 I5 1 11 1 m6m7 0 I 6 20 1 I 7 22 MSB LSB Z = A′.B'.C'.I0 + A'.B'.C.I1 + A'.B.C'.I2 + A'.B.C.I3 + A.B'.C'.I0 + A.B'.C.I1 + A'.B.C'.I2 + A.B.C.I3 Summer2012 ETE 204 - Digital Electronics 5

  6. Multiplexers 20 2n-1 Z =  mi.Ii Summer2012 ETE 204 - Digital Electronics 6

  7. Decoders ● A decoder has - n inputs - 2n outputs ● A decoder selects one of 2n outputs by decoding the binary value on the n inputs. ● The decoder generates all of the minterms ofthe n input variables. - Exactly one output will be active for each combination of the inputs. What does “active” mean? Summer2012 ETE 204 - Digital Electronics 7

  8. Decoders Z0 A Z1Z2Z3 2-to-4 Zi = mi Decoder msb B active-high output A B Z0 Z1 Z2 Z3 m0 0 0 1 0 0 0 m1 0 1 0 1 0 0 m2 1 0 0 0 1 0 1 1 0 0 0 1 m3 Summer2012 ETE 204 - Digital Electronics 8

  9. Decoders Z0 A Z1Z2Z3 2-to-4 Zi = (mi)' = Mi Decoder msb B active-low output A B Z0 Z1 Z2 Z3 M0 0 0 0 1 1 1 M1 0 1 1 0 1 1 M2 1 0 1 1 0 1 1 1 1 1 1 0 M3 Summer2012 ETE 204 - Digital Electronics 9

  10. Decoders msb 3-to-8 Decoder Summer2012 ETE 204 - Digital Electronics 10

  11. Decoder with Enable AB Z0Z1Z2Z3 2-to-4 Decoder with Enable En active-high enable En A B Z0 Z1 Z2 Z3 1 0 0 1 0 0 0 1 0 1 0 1 0 0 enabled 1 1 0 0 0 1 0 1 1 1 0 0 0 1 disabled 0 x x 0 0 0 0 Summer2012 ETE 204 - Digital Electronics 11

  12. Decoder with Enable AB Z0Z1Z2Z3 2-to-4 Decoder with Enable En active-low enable En A B Z0 Z1 Z2 Z3 0 0 0 1 0 0 0 0 0 1 0 1 0 0 enabled 0 1 0 0 0 1 0 0 1 1 0 0 0 1 disabled 1 x x 0 0 0 0 Summer2012 ETE 204 - Digital Electronics 12

  13. Encoders ● An encoder has - 2n inputs - n outputs ● Outputs the binary value of the selected(or active) input. ● Performs the inverse operation of a decoder. ● Issues - What if more than one input is active? - What if no inputs are active? Summer2012 ETE 204 - Digital Electronics 13

  14. Encoders Y0Y1Y2Y3 A 4-to-2 Encoder B Y0 Y1 Y2 Y3 A B 1 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 1 0 0 0 0 1 1 1 Summer2012 ETE 204 - Digital Electronics 14

  15. Priority Encoders ● If more than one input is active, the higher-orderinput has priority over the lower-order input. - The higher value is encoded on the output ● A valid indicator, d, is included to indicate whether ornot the output is valid. - Output is invalid when no inputs are active ● d = 0 - Output is valid when at least one input is active ● d = 1 Why is the valid indicator needed? Summer2012 ETE 204 - Digital Electronics 15

  16. Priority Encoders msb 8-to-3PriorityEncoder Valid bit Summer2012 ETE 204 - Digital Electronics 16

  17. Using a 2n-input Multiplexer ● Use a 2n-input multiplexer to realize a logic circuit fora function with 2n minterms. - n = # of control inputs = # of variables in the function● Each minterm of the function can be mapped to adata input of the multiplexer. ● For each row in the truth table, for the function,where the output is 1, set the corresponding datainput of the multiplexer to 1. - That is, for each minterm in the minterm expansion of thefunction, set the corresponding input of the multiplexer to 1. ● Set the remaining inputs of the multiplexer to 0. Summer2012 ETE 204 - Digital Electronics 17

  18. Using an 2n-input Mux Example: Using an 8-to-1 multiplexer, design a logic circuit to realize the following Boolean function F(A,B,C) = m(2, 3, 5, 6, 7) Summer2012 ETE 204 - Digital Electronics 18

  19. Using an 2n-input Mux Example: Using an 8-to-1 multiplexer, design a logic circuit to realize the following Boolean function F(A,B,C) = m(1, 2, 4) Summer2012 ETE 204 - Digital Electronics 19

  20. Using an 2(n-1)-input Multiplexer ● Use a 2(n-1)-input multiplexer to realize a logic circuitfor a function with 2n minterms. - n - 1 = # of control inputs; n = # of variables in function ● Group the rows of the truth table, for the function, into 2(n-1) pairs of rows. - Each pair of rows represents a product term of (n - 1)variables. - Each pair of rows is mapped to one data input of the mux.● Determine the logical function of each pair of rows interms of the remaining variable. - If the remaining variable, for example, is x, then the possible values are x, x', 0, and 1. 20 Summer2012 ETE 204 - Digital Electronics

  21. Using an 2(n-1)-input Mux Example: F(x,y,z) = m(1, 2, 6, 7) Summer2012 ETE 204 - Digital Electronics 22

  22. Using an 2(n-1)-input Mux Example: F(A,B,C,D) = m(1,3,4,11,12-15) Summer2012 ETE 204 - Digital Electronics 22

  23. Using a 2(n-2)-input Mux A similar design approach can be implemented using a 2(n-2)-input multiplexer. Summer2012 ETE 204 - Digital Electronics 23

  24. Circuit Design using Decoders Summer2012 ETE 204 - Digital Electronics 24

  25. Using an n-output Decoder ● Use an n-output decoder to realize a logic circuit for afunction with n minterms. ● Each minterm of the function can be mapped to anoutput of the decoder. ● For each row in the truth table, for the function, wherethe output is 1, sum (or “OR”) the correspondingoutputs of the decoder. - That is, for each minterm in the minterm expansion of thefunction, OR the corresponding outputs of the decoder. ● Leave remaining outputs of the decoder unconnected. Summer2012 ETE 204 - Digital Electronics 25

  26. Using an n-output Decoder Example: Using a 3-to-8 decoder, design a logic circuit to realize the following Boolean function F(A,B,C) = m(2, 3, 5, 6, 7) Summer2012 ETE 204 - Digital Electronics 26

  27. Using an n-output Decoder Example: Using two 2-to-4 decoders, design a logic circuit to realize the following Boolean function F(A,B,C) = m(0, 1, 4, 6, 7) Summer2012 ETE 204 - Digital Electronics 27

  28. Hierarchical Design ● Several issues arise when designing large multiplexers and decoders (as 2-level circuits). - Number of logic gates gets prohibitively large - Number of inputs to each logic gate (i.e. fan-in) gets prohibitively large ● Instead, design both hierarchically - Use smaller elements as building blocks - Interconnect building blocks in a multi-tier structure Summer2012 ETE 204 - Digital Electronics 28

  29. Hierarchical Design Exercise: Design an 8-to-1 multiplexer using4-to-1 and 2-to-1 multiplexers only. Summer2012 ETE 204 - Digital Electronics 29

  30. Hierarchical Design Exercise: Design a 16-to-1 multiplexer using 4-to-1 multiplexers only. Summer2012 ETE 204 - Digital Electronics 30

  31. Hierarchical Design Exercise: Design a 4-to-16 decoder using 2-to-4 decoders only. Summer2012 ETE 204 - Digital Electronics 31

  32. Questions? Summer2012 ETE 204 - Digital Electronics 32

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