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New Product Introduction: High-Performance 4-PLL Clock Generator

New Product Introduction: High-Performance 4-PLL Clock Generator. Cypress Delivers Industry-Leading Flexible Timing Solutions for Next-Generation Consumer Devices. Consumer Devices Are Driving Faster Data Transfer Standards. Consumer devices are becoming feature-rich and connected

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New Product Introduction: High-Performance 4-PLL Clock Generator

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  1. New Product Introduction:High-Performance4-PLL Clock Generator Cypress Delivers Industry-Leading Flexible TimingSolutions for Next-Generation Consumer Devices

  2. Consumer Devices Are Driving Faster Data Transfer Standards Consumer devices are becoming feature-rich and connected They integrate storage, media processing and connectivity to enhance the user experience So users can create, store and share digital media content anywhere and anytime Sharing high-resolution media content requires faster data transfer standards The data storage transfer protocol has moved from SATA 1.0 to SATA 3.0 Ethernet systems have migrated from 10 Gbps to 100 Gbps USB 3.0 is replacing USB 2.0 for user connectivity Data interconnect standards are moving from PCIe 1.0 to PCIe 3.0 Consumer devices must support multiple data standards, each with specific timing requirements Consumer devices require highly integrated and flexible timing solutions CY274101 Reference Clocks for Data Transfer Standards 100-MHz LVDS, 3-ps RMS Jitter SATA 3.0 Host 48-MHz LVCMOS, 100-ps CCJ2 USB 3.0 Hub CY27410 24 MHz 25-MHz LVCMOS, 100-ps CCJ2 Ethernet MAC 100-MHz HCSL3, 1-ps RMS Jitter PCIe 3.0 Hub 1 CY27410 programmable clock generator can generate up to 12 output frequencies 2 Cycle-to-Cycle Jitter 3 High-speed current steering logic 3a

  3. Pioneer in Programmable Clock Solutions Cypress, the leader in programmable clocks for nearly two decades, designed the world’s first: • Programmable clock generator • Programmable skew buffer • Programmable die for crystal oscillators • Cypress has a broad clock portfolio • 1,700 clock marketing part numbers • Clock generators that generate frequencies up to 700 MHz with <0.6-ps RMS Phase Jitter • Clock buffers that support frequencies up to 1,500 MHz with <0.05-ps RMS Phase Jitter • Industrial- and automotive-grade products • Cypress is a proven and reliable clock supplier that has sold over 2.5 billion units • Offers predictable lead times of ≤6 weeks with greater than 99.4% on-time delivery • Ensures a stable supply for its customers with multiple assembly and test sites • Supports legacy parts >20 years old 3b

  4. Terms You Will Hear Today Cycle-to-Cycle Jitter (ps) The maximum difference in a clock period between two adjacent clock cycles, measured over 1,000 clock cycles Phase Noise (dBc/Hz) Noise power relative to clock signal power, measured in a 1Hz window centered at a given offset frequency from the clock signal RMS Phase Jitter (ps) The integration of Phase Noise over a specified bandwidth, most commonly 12 kHz to 20 MHz (see below) RMS Phase Jitter = , where fc is the clock frequency Voltage Controlled Frequency Synthesis (VCFS) A method by which the frequency of a clock signal is varied based on a control voltage input Phase Noise Plot RMS Phase Jitter Plot Phase Noise PN (f) Phase Noise (dBc/Hz) Power (dBc) RMS Phase Jitter Phase Noise (dBc/Hz) 1-Hz BW Offset fc fc f1 f2 Frequency (kHz) Frequency (kHz) 4a

  5. Terms You Will Hear Today Electromagnetic Interference (EMI) Adisturbance that affects an electrical circuit, often caused by electromagnetic radiation emitted by an external source Clocks create electromagnetic radiation, because of their high frequency and periodic nature Spread Spectrum (SS) Modulation A method used to vary the frequency of a clock signal to spread its energy across a wider frequency range, thus reducing EMI Frequency Select A feature in a clock generator used to select a preprogrammed output frequency using external digital control pins Used also to selectively turn off the reference frequencies to certain peripherals to reduce power consumption Glitch An undesired transition that occurs before the clock signal settles into its intended value SS Modulation in the Frequency Domain Glitch Glitches SS EMI Reduction: Typically 10 dB FCC EMI Limit Volts (V) Using a crystal-based solution Power (dBc) Using a crystal + CY EMI-reduction clock Time (ps) Frequency (kHz) 4b

  6. Design Problems Engineers Face Multiple clocks in consumer devices increase the BOM cost and PCB area Up to 12 reference clocks, including RTC1, may be required for the processors and peripherals (PCIe, USB, SATA, GbE) High-frequency clocks produce enough EMI to violate regulatory emission standards Traditional EMI-reduction solutions, such as ferrite beads and chokes, are expensive and add board space EMI problems threaten time-to-market because EMI testing is typically performed at the end of the development cycle Consumer products require additional components to manage reference clocks Audio systems require Glitch-free clock switching to suppress burst noise2 Multifunction printers need to selectively turn off clocks to certain peripherals to reduce power consumption Consumer devices with multiple systems-on-chip require their respective reference clocks to be in phase with each other Cypress’s CY27410 4-PLL clock generator solves these problems Saves board space by generating up to 12 programmable output frequencies on a single chip Reduces EMI using SS Modulation Simplifies system design with Glitch-free switching, Frequency Select and early/late clocks for phase control Cypress’s high-performance clock generator is a single-chip solution that simplifies system design 1 Real-time clock (32.768 kHz) 2 Audible noise caused by high-frequency Glitches that occur during frequency switching 5

  7. D + C CY27410 vs. Competition V Feature CY274xx 5P49V5901A Si5338 7a

  8. D + C CY27410 vs. Competition Feature CY274xx 5P49V5901A Si5338 7b

  9. The CY27410 Is a Better Solution Simplify a conventional design using multiple timing components… By selecting Cypress’s multi-output programmable clock… To produce an integrated, low-cost timing solution for multiple applications. Multifunction Printer 10GbE PCIe Clock 10GbE Clock Separate chip for each data transfer standard Femtocell With ferrite beads and chokes to reduce EMI 4-PLL Clock Generator Reference clocks for PCIe, SATA, GbE and USB Spread Spectrum Modulation to reduce EMI Low-frequency support for RTC Configurable as zero or non-zero delay buffer Car Infotainment System Real-Time Clock ( RTC) Clock Buffer And other components such as RTC and buffers 6

  10. Timing Solutions Portfolio (NDA) Programmable | High-Performance | EMI Reduction | Automotive CY274xMax. Frequency: 700 MHz 12 outputs; PCIe 3.0; 4 PLL 0.7-ps RMS Jitter1; Ind2;Auto A3 CY294x/ CY5107 Max. Frequency: 2.1 GHz 1 output; 40/100 GbE; 1 PLL 0.15-ps RMS Jitter1; Ind2 NEW NEW Q315 Q115 High Performance CY276xMax. Frequency: 700 MHz 8 outputs; PCIe 3.0, 10GbE; 2 PLL 0.7-ps RMS Jitter1; Ind2;Auto A3 CY2Xx (FleXO™) Max. Frequency: 690 MHz 1 output; Frequency Margining 0.6-ps RMS Jitter1; Ind2 CY2DLx/DMx/DPx/CPx Max. Frequency: 1.5 GHz 2-10 outputs; LVDS, LVPECL, CML 0.05-ps RMS Jitter1; Ind2 NEW CY254x/CY251xMax. Frequency: 166 MHz 3-9 outputs; 1-4 PLL; I2C 100-ps CCJ4; Ind2 CY2239x/CY229x/CY2238x Max. Frequency: 200 MHz 3-6 outputs; 3-4 PLL; I2C 400-ps CCJ4; Ind2;Auto E5 Standard Performance CY22800/801 Max. Frequency: 166 MHz 3 outputs; 1 PLL 250-ps CCJ4; Ind2 CY22050/150 Max. Frequency: 200 MHz 3-6 outputs; 1 PLL 250-ps CCJ4; Ind2 CY230x/EP0x Max. Frequency: 220 MHz 5-9 outputs; LVCMOS 22-ps CCJ4; Ind2;Auto A3 CY230xNZ Max. Frequency: 133 MHz 4-18 outputs; LVCMOS 250-ps CCJ4; Ind2 CY23FS04/08 Max. Frequency: 200 MHz 4-8 outputs; Fail Safe6 200-ps CCJ4; Ind2 CY278xMax. Frequency: 200 MHz 4 outputs; PCIe 3.0; 1 PLL < 0.7-ps RMS Jitter1; Ind2;Auto A3 NEW CY24293AMax. Frequency: 200 MHz 2 outputs; 1 PLL; PCIe 1.1 75-ps CCJ4; Auto A3 CY23S02/05/08/09/FP12 Max. Frequency: 200 MHz 2-12 outputs; Spread Aware 200-ps CCJ4; Ind2 NEW Q115 Application Specific CY2429x Max. Frequency: 200 MHz 2-4 outputs; PCIe 1.1 75-ps CCJ4; Ind2 CY7B99x (RoboClock™) Max. Frequency: 200 MHz 8-18 outputs; Configurable Skew 50-ps CCJ4; Ind2 Production Sampling Development Concept 1 Integrated phase noise across 12-kHz to 20-MHz offset 2 Industrial grade: -40ºC to +85ºC 3 AEC-Q100: -40ºC to +85ºC 4Cycle-to-cycle jitter 5AEC-Q100: -40ºC to +125ºC 6 Automatic clock switching on failure of a clock source Status Availability QQYY QQYY

  11. Product Overview Applications Block Diagram Multifunction printers Digital TVs Blu-ray recorders Home gateways Femtocells Routers and switches Four-PLL Spread-Spectrum Clock Generator Out1 Out2 Out3P Out3N Out4P Out4N Out5P Out5N Out6P Out6N Output Bank 1 PLL 1 Block Divider Divider PLL Divider Divider Features Input Block XIN1 XOUT2 IN1P3 IN1N3 IN2P3 IN2N3 • High frequency: 700-MHz differential, 250-MHz single-ended • Pin select and I2C programming • Twelve outputs: • Eight configurable as differential or single-ended • Four single-ended • Reference clock support for PCIe 3.0, SATA 2.0 and 10 GbE • RMS Phase Jitter<0.7 ps (typical) • Additional features: • Configurable as zero or non-zero delay buffer • Glitch-free frequency switching • Frequency Select • Early/ late clocks • PLL cascading • Voltage Controlled Frequency Synthesis PLL 2 Block Output Bank 2 Out7P Out7N Out8P Out8N Out9P Out9N Out10P Out10N Out11 Out12 SCLK4 SDAT4 VIN5 FS26 FS16 FS06 Memory and Control Logic PLL 3 Block PLL 4 Block Collateral Availability Preliminary Datasheet: Contact Sales Sampling: Now Production: Q2 2015 1 Crystal input 2 Crystal output 3 Reference clock inputs 4 Serial port 5 Voltage input pin for VCFS 6 Frequency Select inputs 11

  12. Here’s How to Get Started Visit the Cypress Timing Solutions website: www.cypress.com/go/timing See our roadmap for Timing Solutions: www.cypress.com/go/TimingRoadmaps Request a preliminary datasheet: Contact Sales Contact us for questions: clocksandbuffers@cypress.com 12

  13. APPENDIX 15

  14. Product Selector Guide Part Numbering Decoder CY274XXFLTXX - XXX Configuration identifier: Blank = Field programmable, XXX = Factory programmed Grade: I = Industrial, A = Automotive Package Type: Pb-free QFN Programmability: F = Field programmable, Blank = Factory programmed Product Type: 10 = Industrial, 30 = Automotive Marketing Code: 274 = Clock Generators Company ID: CY = Cypress 16

  15. References and Links Cypress Timing Solutions Website: www.cypress.com/go/timing Timing Solutions Roadmap: www.cypress.com/go/TimingRoadmaps Product Overview: www.cypress.com/go/CY27410 Programming and Evaluation Kits: www.cypress.com/go/TimingKits Software: www.cypress.com/go/TimingSoftware Application Notes: www.cypress.com/go/TimingAppNotes Contact us for questions: clocksandbuffers@cypress.com 18

  16. CY27410 Value vs. Competition 1 1ku Digikey pricing on 07/30 /2014 (SL15300 price is for 2.5ku) 2 IDT5P49V5901A can generate eight LVCMOS frequencies and needs IDT5V19EE403NLG18 to generate the remaining four LVCMOS frequencies to match CY27410   SI5338 can generate eight LVCMOS frequencies and needs SL15300ZCT to generate the remaining four LVCMOS frequencies to match CY27410 3IDT5P49V5901A can generate four differential frequencies and needs IDT74FCT3807DCGI to generate the remaining four differential frequencies to match CY27410   SI5338 can generate four differential frequencies and needs SI52144-A01AGM to generate the remaining four differential frequencies to match CY27410 4 SI5338 requires SI5351A-B-GT to provide VCFS and glitch-free outputs 5 IDT and SiLabs require an external crystal MC-306 32.7680K-A0:ROHS (1ku pricing) to support low-frequency RTC outputs (32.768 kHz) 8

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