August 20 th , 2008 qatar.cmu

1. Introduction to Computer Architecture Lecture 2 – Digital Logic Design August 20th, 2008 www.qatar.cmu.edu

2. +5 V T ime –5 Digital Systems Digital vs. Analog Waveforms Digital: only assumes discrete values Analog: values vary over a range continuously

3. Digital Hardware Systems Boolean Algebra and Logical Operators Algebra: variables, values, operations In Boolean algebra, the values are the symbols 0 and 1 If a logic statement is false, it has value 0 If a logic statement is true, it has value 1 Operations: AND, OR, NOT

4. L1 L4 L6 L2 L5 L7 L3 Example: Seven Segment Display • Chip to drive digital display

5. L1 L4 L6 L2 L5 L7 L3 Example (cont.)

6. Implement L4: Example (cont.) Some gate level implementation of the Boolean function for L4

7. Representations of Digital Design: Switches A switch connects two points under control signal. when the control signal is 0 (false), the switch is open when it is 1 (true), the switch is closed Normally Open Normally Closed when control is 1 (true), switch is open when control is 0 (false), switch is closed

8. Switch Representations routing inputs to outputs through a maze Examples: Floating nodes: what happens if the car is not running? outputs are floating rather than forced to be false Under all possible control signal settings (1) all outputs must be connected to some input through a path (2) no output is connected to more than one input through any path

9. Steering Logic: Switches Voltage Controlled Switches n-type Si p-type Si "n-Channel MOS" Metal Gate, Oxide, Silicon Sandwich Diffusion regions: negatively charged ions driven into Si surface Si Bulk: positively charged ions By "pulling" electrons to the surface, a conducting channel is formed

10. Switching or Steering Logic Voltage Controlled Switches Logic 1 on gate, Source and Drain connected Logic 0 on gate, Source and Drain connected

11. +5V +5V Using Switches to implement Logic Inverter Operation "1" "0" "0" "1" Input is 1 Pull-up does not conduct Pull-down conducts Output connected to GND Input is 0 Pull-up conducts Pull-down does not conduct Output connected to VDD

12. +5V +5V NAND Gate NAND Gate Operation "1" "0" "1" "1" "0" "1" A = 0, B = 1 Pull-up network has path to VDD Pull-down network path broken Output node connected to VDD A = 1, B = 1 Pull-up network does not conduct Pull-down network conducts Output node connected to GND

13. +5V +5V NOR Gate NOR Gate Operation "0" "1" "0" "0" "1" "0" A = 0, B = 0 Pull-up network conducts Pull-down network broken Output node at VDD A = 1, B = 0 Pull-up network broken Pull-down network conducts Output node at GND

14. Switch Representations Implementation of AND and OR Functions with Switches AND function Series connection to TRUE OR function Parallel connection to TRUE

15. Representations of a Digital Design Truth Tables tabulate all possible input combinations and their associated output values Example: half adder adds two binary digits to form Sum and Carry Example: full adder adds two binary digits and Carry in to form Sum and Carry Out NOTE: 1 plus 1 is 0 with a carry of 1 in binary

16. Representing Digital Design: Boolean Algebra values: 0, 1 variables: A, B, C, . . ., X, Y, Z operations: NOT, AND, OR, . . . NOT X is written as X X AND Y is written as X & Y, or sometimes X Y X OR Y is written as X + Y Deriving Boolean equations from truth tables: Sum = A B + A B Carry 0 0 0 1 A 0 0 1 1 B 0 1 0 1 Sum 0 1 1 0 OR'd together product terms for each truth table row where the function is 1 if input variable is 0, it appears in complemented form; if 1, it appears uncomplemented Carry = A B

17. Representing Digital Logic: Boolean Algebra Another example: Sum = A B Cin + A B Cin + A B Cin + A B Cin Sum 0 1 1 0 1 0 0 1 Cout 0 0 0 1 0 1 1 1 A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 Cin 0 1 0 1 0 1 0 1 Cout = A B Cin + A B Cin + A B Cin + A B Cin

18. Gate Representations of a Digital Design most widely used primitive building block in digital system design Standard Logic Gate Representation Half Adder Schematic A SUM B CARR Y Net: electrically connected collection of wires Netlist: tabulation of gate inputs & outputs and the nets they are connected to

19. Representations of a Digital Design: Gates Full Adder Schematic Fan-in: number of inputs to a gate Fan-out: number of gate inputs an output is connected to Technology "Rules of Composition" place limits on fan-in/fan-out

20. Waveform Representation dynamic behavior of a circuit real circuits have non-zero delays Timing Diagram of the Half Adder sum propagation delay sum propagation delay circuit hazard: 1 plus 0 is 1, not 0! Output changes are delayed from input changes The propagation delay is sensitive to paths in the circuit Outputs may temporarily change from the correct value to the wrong value back again to the correct value: this is called a glitch or hazard

21. Routing Stuff Around – Multiplexors and Demultiplexors Multi-point connections A0 A1 B0 B1 Multiple input sources Sa MUX MUX Sb B A Sum Multiple output destinations Ss DEMUX S0 S1

22. So far Combinatorial (or stateless) logic • Things don’t get really interesting until we have memory elements • Think about a digital watch, or a vending machine (or a microprocessor!) • This is called “Sequential Logic” • Two questions: • How do we design memory elements? • How do we create logic that remembers? • How do we design sequential logic

23. Memory Elements • The trick is to use feedback Cascaded Inverters: Static Memory Cell "1" "0" D Q Clk • Example: D-Latch • Latch vs. Flip Flop • Flip flop: two latches in a row • Allows you to read the old value and write a new value without a race condition D Clk Q

24. Sequential Logic Design • State as part of the input • Next state as part of the output • State stored in flip flops (registers!) • Clock controls everything (synchronous logic) • Lets rethink our 8 segment display example to make it display a counter inputs outputs Combinatorial Logic Current state Next state State

25. Take home points • Logic built using switches (transistors) • Boolean algebra and truth tables • Translation to gates: sum of products • Multiplexors, demultiplexors, ALU … all designed this way • Sequential logic • Memory elements • Old state part of inputs, next state part of outputs • Counters, registers, control all designed this way