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Logical Effort Tool

Spring 2005 VLSI2. Logical Effort Tool. Minsik Cho. Design objective. Fast calculation Various circuit topologies Easy to modify circuits Reload previous circuits. C++ / Tcl. Use C++, for fast computation Use Tcl, for topology representation Who also is using C++/Tcl together?

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Logical Effort Tool

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  1. Spring 2005 VLSI2 Logical Effort Tool Minsik Cho

  2. Design objective • Fast calculation • Various circuit topologies • Easy to modify circuits • Reload previous circuits

  3. C++ / Tcl • Use C++, for fast computation • Use Tcl, for topology representation • Who also is using C++/Tcl together? NS2: Network simulator (USC) use Tcl for network topology use C++ for actual simulation Probably DesignCompiler(Synopsys)

  4. Working Environment • Windows 2000 or above/ Linux • Visual C++/g++ • Tcl/TK 8.0 or above installed

  5. Tool Design Library Tcl command User command Tcl command User command User Command Implemented in C++ Variables TCL Command

  6. Commands and Demo STAGE0 STAGE1 STAGE2 mux2 inv nand2 3inv inv inv

  7. Interesting 90nm library • nand2 is faster than inv for high load.

  8. Future Work & QA • More commands • Optimal covering • Logical effort optimization

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