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LZ2 DDR3 Block Diagram

LZ2 DDR3 Block Diagram. NK 0100 Jimmy Ge 30/ 4 /08. LZ2 Block Diagram. LZ2 Clock Diagram. HD AUDIO CODEC ALC269. CLK_PCIE_MINI#. SRC6#. (100 MHz). MINI PCIE CONN. CLK_PCIE_MINI. Penryn 4 M/ 6 M SV 35W CPU. SRC6. (100 MHz). CLK_CPU_BCLK. ( 166/200MHz).

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LZ2 DDR3 Block Diagram

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  1. LZ2 DDR3 Block Diagram NK 0100 Jimmy Ge 30/4/08

  2. LZ2 Block Diagram

  3. LZ2Clock Diagram HD AUDIO CODEC ALC269 CLK_PCIE_MINI# SRC6# (100MHz) MINI PCIE CONN CLK_PCIE_MINI Penryn 4M/6M SV 35W CPU SRC6 (100MHz) CLK_CPU_BCLK (166/200MHz) BLK0 CPUT0 CLK_CPU_BCLK# (166/200MHz) ACZ_BITCLK_MDC ACZ_BITCLK_RTL CPUC0 BCLK1 CLK_14M_ICH REF0/FSC/TEST_SEL (14MHz) ICH9-M MDC CLK_PCIE_ICH SRCT3/CR# (100MHz) CLK_PCIE_ICH# SRCC3/CR# (100MHz) CLK_PCIE_SATA SRCT2/SATAT (100MHz) CLK_PCIE_SATA# SRCC2/SATAC (100MHz) ICH_SMBCLK SCL X’tal 32.768KHz ICH_SMBDATA SDA X5 CLK48_ICH (48MHz) CLK48_ICH CLK_PCI_ICH PCIF5/ITP_EN (33MHz) CLK_SATA_OE# SUSCLK CLKGEN PCIF0/CR#_A EMC2102 Host Bus (800/1066MHz) 32KHz ICS9LPRS355 ICH_SUSCLK LAN BROADCOM 5906 CANTIGA -GM/PM PCIE_CLK_LAN (800/1066MHz) CLKREQ_MCH# X’tal 25MHz PCI1/CR#_B (100MHz) SRCT9 X1 PCIE_CLK_LAN# DIMM1 SRCC9 DDRCLK0_1066M (100MHz) CLK_MCH_BCLK DDRCLK0_1066M# CPUT1 (166/200MHz) CLK_MCH_BCLK# KBC WPCE776L (166/200MHz) DDRCLK1_1066M CPUC1 X’tal 32.768KHz PCLK_KBC X2 DDRCLK1_1066M# CLK_MCH_3GPLL PCI4/GCLK_SEL SRCT4 (100MHz) (33MHz) CLK_MCH_3GPLL# (100MHz) SRCC4 (800/1066MHz) (100MHz) DREFCLKSS_100M PCLK_FWH DIMM2 SRCT1/LCDT_100/27M_NSS SRCC1/LCDT_100/27M_SS DDRCLK2_1066M FWH PCI2/TME -DREFCLKSS_100M DDRCLK2_1066M# (100MHz) DDRCLK_1066M DREFCLK_96M (33MHz) (96MHz) SRCT0/DOT96T SRCC0/DOT96C DDRCLK3_1066M# RTS5158E CardReader -DREFCLK_96M (96MHz) CLK_PCIE_NEW CLK_48M_R5158 SRC10 (100MHz) USB_48M/FSLA New Card CONN CLK_PCIE_NEW# SRC10# (100MHz) (48MHz) XIN XOUT X’tal 14.318MHz X3

  4. 1 G 1 3 2 G 3 2 D S 5V_S0 3D3V_S5 3D3V_S0 4K7 4K7 4K7 4K7 ICH9-M ICH_SMBCLK ICH_SMBDATA SMB Interface SMB_CLK 3D3V_S0 SMB_DATA CLK GEN ICS9LPRS355 1D5V_S3 1D5V_S3 MINI PCIE NEW CARD DDR3 DIMM II DDR3 DIMM I 5V_S0 3D3V_S0 3D3V_S0 3D3V_AUX_S5 3D3V_S0 3D3V_AUX_KBC 10K VCC 5V_S0 SMBC_THERM 2N7002 EMC2102 KBC 10K SMBD_THERM 2N7002 D S 10K WPCE776L BAT_SCL Battery BAT_SDA TP_CLK TP_DATA Touch Pad

  5. 1 2 Audio Block Diagram 3D3V_S0 AUD_3VD KBC WPCE776L EC_BEEP_PWM ICH9-M ACZ_SPKR Audio Power Supply 5V_S0 AUD_5VA XOR AUDIO_PC_BEEP PCBEEP LCD CONN AUDIO CODEC ALC269 INT_MIC MIC2_L MIC2_R HD Audio HD Audio EXT_MIC MIC1_R MIC1_L MIC_IN AZALIA HEADPHONE HP_OUT_R HP_OUT_L H.P.JACK MDC CON. SPEAKERL SPKL- SPKL+ SPKR- SPKR+ 1.5 Watt SPEAKERR TIP RING 1.5 Watt RJ11 CON.

  6. 1 1 2 2 LZ2 Charger Block Diagram (when AD+ plug in,this signal turn on) U63 R14 ADPDRV# 5 4 1 D G 6 3 AD+_TO_SYS 1 2 D S 7 2 D01R2512F D S 8 1 D S AO4407 ACDET ACP SR_SET ACN SRSET ACSET ACSET CHARGER BQ24740 5 6 7 8 D D D D U65 BT+ BATTERY PVCC BAT G S S S 3D3V_AUX_S5 HIDRV 4 3 2 1 R39 L1 1 2 PH 1 2 10K D01R2512F BT_SDA BT_SCL 5 6 7 8 LODRV 10K D D D D U67 CHG_ON# CHGEN# AC_IN# EXTPWR# G S S S SRP 4 3 2 1 SCL1 GPIO56 GPIO06 SRN SDA1 KBC WPCE776L

  7. LZ2VCC_CORE Block Diagram VCC_CORE_S0 DCBATOUT Intel CPU Pernyn 4M/6M SV ADP3208 6262_UGATE1 VID[0..6] DRVH1 VCC_CORE_S0 6262_PHASE1 SW1 6262_LGTAE1 DRVL1 VID[0..6] 1D8V_S3 1D05V_S0 BST1 DCBATOUT 6262_UGATE 2 DRVH2 TPS51124 CPUCORE_ON EN SW2 6262_PHASE 2 5V_S5 3D3V_S5 6262_LGTAE 2 DRVL2 VGATE_PWRGD TPS51120 BST2 CLKEN# VCC_CORE_S0 H_DPRSTP# DPRSTP# 1D05V_S0 DPRSLPVR APL5912 DPRSLPVR ICH9-M

  8. LZ2 Power ON/RESET Sequence(Adapter IN) 4 -7 -5 3D3V_S0 -6 Adapter IN AD+ DCBATOUT AO4488 -4 5V_AUX_S5 3D3V_S5 5V_S0 3D3V_AUX_S5 AO4488 -3 charge BQ24740 PM_SLP_S3# WPCE 776L AND 3 TPS51120 AC_IN# S5_ENABLE PM_SLP_S3# 5V_S5 -2 DDR_VREF_S3 3D3V_AUX_S5 2 ICH9-M TPS51100 DGQ PWR_S5_EN# 1 WPCE 776L DDR_VREF_S0 SLP_S4# PM_SLP_S4# 2 GPIO03 KBC_PWRBTN# PWRBTN# PM_SLP_S4# 1D05V_S0 PM_SLP_S3# PM_SLP_S3# TPS51124 SLP_S3# 3 PM_SLP_S4# 1D5V_S3 AO4488 1D5V_S0 5 RSMRST# EC_RST# VCC_POR# PM_SLP_S3# PWRGD -1 PM_SLP_S3# 10 AND PM_PWROK THRM_RST# VCC_CORE_S0 7 CPUCORE_ON APL5912 CLK ICS9LPRS355 CPUCORE_ON TPS51124 6 CPUCORE_ON ADP3208 CPUCORE_ON TPS51120 CPUCORE_ON CLK_EN# CKPWRGD APL5913 VGATE_PWRGD 8 ICH9-M VRMPWRGD 9 CK_PWRGD CK_PWRGD PWROK Cantiga-GM/PM PCIRST# 12 PLT_RST1# LAN_RST# BROADCOM LAN Intel CPU Penryn 4M/6M SV 13 RSTIN# New Card 14 CPUPWRGD/GPIO49 H_CPURST# Mini Card H_RESET# RESET# 11 H_PWRGOOD PWRGOOD

  9. LZ2 Power Block Diagram AD+ BQ 24740 DCBATOUT 5V_AUX_S5 51120_VREG5 BT+ 51120_VREG3 3D3V_AUX_S5 TPS51120 TPS51120_EN1_5 3D3V_S0 MOS 3D3V_S5 TPS51120_EN2_3D3 5V_S5 POK MOS 5V_S0 PWR_S5 _EN# S5_EN KBC PM_SLP_S3# 1D5V_S0 MOS 1D5V_S3 ICH9-M 0D75V_PWR 0D75V_S3 PM_SLP_S4# TPS51124 (S0 EN) TPS51100DGQ POK DDR_VREF_S3 (S3 EN) 1D05V_S0 CPUCORE_ON VCC_CORE_S0 ADP3208

  10. LZ2 Power Good 3D3V_S0 Intel CPU Pernyn 6M/4M SV CLK GEN CKPWRGD PWRGOOD Cantiga-GM/PM CKPWRGD/PWRDWN# H_PWRGOOD PWROK VR_PWRG PGOOD CPUPWRGD/GPIO49 ADP3208 VGATE_PWRGD CPUCORE_ON VRMPWRGD CLK_EN# VR_ON ICH9-M PM_SLP_S3# PM_PWROK 5V_S0 EMC2102 74LVC 1G08 (AND) PWROK THRM_RST# RESET# 100K Note: 1, CPUPWERGD = VRMPWRGD & PWROK 2, CPUCORE_ON is asserted when 3.3V, 5V,1.8V, 1.05V and 1.5V are all stable.

  11. Thermal Block Diagram EMC2102 KBC WPCE7765L SMB Bus FAN CPU S5_ENABLE H/W Sensor G709 AND PWR_S5_EN# TPS51120 Sensor T8_HW_SHUT# Thermal Protection: 1. Fan 2. Software Shutdown 3. Hardware Shutdown

  12. LZ2 USB PORTS USB JACK USB0 USB2 BLUE TOOTH USB4 USB5 USB JACK Finger print USB6 Wireless card USB7 USB8 camera New card USB9 USB10 Card reader

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