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MUID FEE TAC Presentation

MUID FEE TAC Presentation. Vince Cianciolo 7 May 1998. Outline. Intro In-panel electronics Out-panel electronics Cost & Schedule. MUID FEE Team. Vince Cianciolo: Subsystem Manager Ganesh Rao: ROC Design (Digital) Bobby Whitus: ROC Design (Analog) Tim Gee: FEM Design

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MUID FEE TAC Presentation

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  1. MUID FEE TAC Presentation Vince Cianciolo 7 May 1998

  2. Outline • Intro • In-panel electronics • Out-panel electronics • Cost & Schedule

  3. MUID FEE Team • Vince Cianciolo: Subsystem Manager • Ganesh Rao: ROC Design (Digital) • Bobby Whitus: ROC Design (Analog) • Tim Gee: FEM Design • Steve Hicks: FEM design, Crate/TC/Backplanes • Yuri Kamyshkov, Yuri Efremenko: In-panel amplifiers • Consulting with: • B. Bryan: System Considerations • M. Smith: PC Heap Manager, Test Fixtures, G-link • J. Walker: Test Fixtures • H. Skank: 6x Generator

  4. MUID in PHENIX

  5. MUID in PHENIX

  6. MUID Operation • Reconstruct tracks in two orthogonal views; find maximum depth. • Obtain precision momentum measurement from Muon Tracker. • p rejection (10-4) via momentum/depth discrimination. • Struck bit pattern is LVL1 input (where steerable road algorithm is implemented).

  7. MUID Numbering • 2 arms • 5 gaps/arm • 4 large, 2 small panels/arm • Large panels • H: 118 tubes > 59 channels > 4 16-pair signal cables • V: 128 tubes > 64 channels > 4 16-pair signal cables • Small panels • H: 90 tubes > 45 channels > 3 16-pair signal cables • V: 52 tubes > 26 channels > 2 16-pair signal cables • MUID • H: 6520 tubes > 3260 channels > 220 16-pair signal cables • V: 6160 tubes > 3080 channels > 200 16-pair signal cables • 6340 active channels, 6720 channels instrumented

  8. MUID Gap

  9. MUID Panels

  10. Iarocci Tubes

  11. MUID Readout Channel(2-pack) • Halve readout channels • Improves timing • Eliminate geometrical inefficiency • Add redundancy

  12. MUID FEE Requirements • Integrating filter to reduce noise from large tube capacitance (500-1000 pF/channel). • Capabilty to drive long cables (~20 m). • All signals arrive within one beam clock cycle for LVL1. • Only digital information (struck bit pattern) required. • Longevity (!) for anything inside the panel.

  13. MUID FEE Processing Chain

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