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System Software Design

This document outlines the system design for the CY8C29466 microcontroller, focusing on a string-less architecture to enhance performance and efficiency. It implements a time-slice kernel to manage 11 tasks, including a startup task, check string task, and 8 interrupt service routines (ISRs) for string detection. The system operates with a bus frequency of 24 MHz and requires minimal memory (1 KB ROM, 100 B RAM), ensuring efficient use of resources. The design also includes detailed timing specs and CPU load calculations to optimize task execution.

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System Software Design

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  1. System Software Design String-less Harp Sam Tjoelker

  2. General System Design • MCU: CY8C29466 • MCU Bus Frequency: 24 MHz • Memory Requirements: 1 KB ROM, 100 B RAM • 4 digital blocks for interrupts, 1-2 digital blocks for PWM • Kernel Choice – Time slice

  3. Kernel Task Design • 11 tasks: • Start Task • Checkstring Task • 8 “String” ISR’s • 1 Counter ISR

  4. Start Task Description: • Initializes system • Period: once (at start-up) • Execution time ~ 1s

  5. Checkstring Task Description: • Checks for “string” flag • Stops PWM and counter • Starts PWM and counter with appropriate frequency seed • Clears “string” flag • Period: periodic (8ms) • Execution time ~ 50us

  6. “String” ISR Description: • Sets appropriate “string” flag • Period: sporadic (worst case: 2ms) • Execution time ~ 2us

  7. Counter ISR Description: • Stops PWM and counter • Period: sporadic (worst case:8ms) • Execution time ~ 2us

  8. CPU load L max= (50us) + (2us) + 8*(2us) + (2us) (8ms) (2ms) (2ms) (8ms) L max= 14.5%

  9. Modules

  10. Data Flow Diagram boot.asm main.c

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