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Microelectronics 2

Electrical Engineering 2. Lecture 4. Microelectronics 2. Dr. Peter Ewen. (Room G08, SMC; email - pjse). ELECTRICAL ENGINEERING 2 Microelectronics 2 Dr. P.J.S. Ewen. LECTURES: Mondays 12.10-13.00 Swann 7.20 Fridays 10.00-10.50 JCMB 5327. TUTORIALS: Mondays 11.10-12.00 Eng. CR 4

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Microelectronics 2

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  1. Electrical Engineering 2 Lecture 4 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; email - pjse)

  2. ELECTRICAL ENGINEERING 2 Microelectronics 2 Dr. P.J.S. Ewen LECTURES: Mondays 12.10-13.00 Swann 7.20 Fridays 10.00-10.50 JCMB 5327 TUTORIALS: Mondays 11.10-12.00 Eng. CR 4 (Monday Lab Group) Tuesdays 11.10-12.00 Eng. CR 4 (Friday Lab Group) N.B. Tutorials run in weeks 3, 5, 7, 9, 11

  3. - + Semiconductor Electron-hole pair Si Si Si -ve +ve Fig. 20 Electric field  +ve charge associated with vacancy  the vacancy is mobile  the vacancy acts like a mobile +ve charge

  4. INTRINSIC SEMICONDUCTORS Pure semiconductors are termed “intrinsic”: Si Si Si n = p = ni n – free electron concentration; p – hole concentration ni – intrinsic carrier concentration (N.B. ni ≠ n + p) At 300K: ni = 1.5x1016 m-3 for Si ni = 2.5x1019 m-3 for Ge

  5. Eg C.B. Fig. 21 RECOMBINATION GENERATION V.B. CARRIER LIFETIME - : 10-9 <  < 10-6 s

  6. n-type pentavalent donor atoms p-type trivalent acceptor atoms EXTRINSICSEMICONDUCTORS Substitutional impurities – they can be incorporated into the semiconductor lattice without distorting it. Typical doping concentrations: 1020 – 1026 m-3

  7. C.B. Fig. 22 Donor levels Energy ~0.01 eV Si V.B. Si Si As n-type Si Donor atom Si

  8. C.B. Fig. 22 Energy ~0.01 eV Acceptor levels Si V.B. Si Si B p-type Si Acceptor atom Si

  9. i i i i i Fig. 23: Typical range of conductivities/resistivities for metals insulators and semiconductors.

  10. Fig. 24 Temperature Coefficient of Resistance def

  11. LECTURE 4  Influence of temperature on carrier concentrations in semiconductors • Majority and minority carriers • The Fermi-Dirac distribution function

  12. 100 200 300 400 500 600 Fig. 25: Free electron concentration vs. temperature for intrinsic and extrinsic silicon 3×1021 Intrinsic Si n-type Si doped with ND = 1021 m-3 INTRINSIC REGION 2×1021 (Free) electron concentration, n / m-3 EXTRINSIC REGION 1021 ni IONISATION REGION 0 Temperature / K

  13. Si Si Si As Donor atom Si Intrinsic Si Energy required to break a silicon bond is ~1.1ev Si n-type Si Si Si Si Si Energy required to detach a donor electron is ~0.01ev

  14. 100 200 300 400 500 600 3×1021 • Same considerations apply to p-type Si (p = NA in saturation region) 2×1021 • Extrinsic material effectively becomes intrinsic above a certain transition temperature – bad news for devices! (Free) electron concentration, n / m-3 Hole concentration, p / m-3 1021 ni ni ni Ge Si GaAs Temperature, T / K

  15. 8. Maximum working temperature for a semiconductor device The maximum temperature, Tmax, at which a device can operate is fixed by the semiconductor material from which it is made. At Tmax, ni= ND for n-type material and ni= NA for p-type material. If ni = C exp (-Eg/ 2kT) where Eg is the energy gap, T the temperature in degrees K, C is a constant and k is Boltzmann's constant, determine Tmax for a GaAs sample doped with 1020 donors m-3, given that for GaAs, Eg= 1.42 eV and C = 18.1x1023 m-3.

  16. 8. Maximum working temperature for a semiconductor device For an n-type semiconductor, by definition the (approximate) maximum working temperature, Tmax, is the temperature at which ni = ND.

  17. But at T = Tmax, ni = ND So for a GaAs sample doped with 1020 donors m-3: (The 1.610-19 in the above converts eV to joules.)

  18. This calculation ignores the change in Eg due to temperature: Eg decreases from 1.42 to 1.2eV over this temperature range. However, even if you correct for this, the maximum working temperature for GaAs is still greater than 450oC, much higher than for Si.

  19. 3×1021 *Provided semiconductor is in this temperature range 2×1021 Carrier concentration / m-3 1021 ni 100 200 300 400 500 600 Temperature, T / K Majority and Minority Carriers For intrinsic semiconductors: n = p = ni  np = ni2 For extrinsic semiconductors: nn >> pn for n-type pp >> np for p-type For extrinsic semiconductors it also turns out that: np = ni2 ni – the intrinsic carrier concentration n – the free electron concentration p – the hole concentration *

  20. 3×1021 *Provided semiconductor is in this temperature range 2×1021 Carrier concentration / m-3 1021 ni 100 200 300 400 500 600 Temperature, T / K So for extrinsic semiconductors: nnpn = ni2 for n-type nppp = ni2 for p-type nn≈ ND for n-type pp≈ NA for p-type ND – donor concentration NA – acceptor concentration * Thus for n-type: nn≈ ND ; pn≈ ni2 / ND for p-type: pp≈ NA ; np≈ ni2 / NA Electrons in n-type – majority carriers Holes in n-type – minority carriers Holes in p-type – majority carriers Electrons in p-type – minority carriers

  21. 100 200 300 400 500 600 9. Carrier concentrations (Bogart, 4th Edition, Ex. 2-18, p.41) A silicon wafer is doped with 1.8x1020m-3 atoms of As. If ni= 1.6x1016m-3 determine the electron and hole concentrations, n and p. (Assume the temperature is in the extrinsic region of operation.) 6×1020 *Provided semiconductor is in this temperature range 4×1020 Electron concentration / m-3 2×1020 ni Temperature, T / K

  22. 9. Carrier concentrations Arsenic is an n-type dopant hence:

  23. Which of the following statements is true: • Holes in an n-type semiconductor are… • Majority carriers that are thermally produced • Minority carriers that are produced by doping • Minority carriers that are thermally produced • Majority carriers that are produced by doping

  24. The Fermi-Dirac Distribution Function E C.B. Donor levels Statistical processes Energy Eg V.B. N(E) F(E) x n(E) = Total number of electrons at energy E Total number of states at energy E Probability that a state at energy E is occupied

  25. F(E) is the Fermi-Dirac Distribution Function EF – the Fermi Level  A state at the Fermi level, EF, has a 50-50 chance of being occupied

  26. Fig. 26 F(E) for an INTRINSIC semiconductor E C.B. EC ½EG EF Energy, E ½EG EV V.B. 0 ½ 1 F(E) THE FERMI-DIRAC DISTRIBUTION

  27. EF Fig. 27 F(E) for an n-type semiconductor E C.B. EC donor levels Energy, E EV V.B. For n-type semiconductors the Fermi level lies closer to the conduction band edge, Ec 0 ½ 1 F(E) THE FERMI-DIRAC DISTRIBUTION

  28. Fig. 28 F(E) for a p-type semiconductor E C.B. EC acceptor levels Energy, E EF EV V.B. For p-type semiconductors the Fermi level lies closer to the valence band edge, Ev 0 ½ 1 F(E) THE FERMI-DIRAC DISTRIBUTION

  29. Degenerate Semiconductors Fig. 29 C.B. C.B. EF Donor levels Energy EG EG Acceptor levels EF V.B. V.B. Degenerate p-type Degenerate n-type C.B. EF V.B. Metal

  30. For a semiconductor sample at 0 K, what is the probability • that a state at the top of the valence band is occupied by an • electron? • A. 0 • B. 1 • C. ½ • D. Between 1 and ½

  31. The Fermi level, EF, for a silicon sample lies 0.8eV above the • valence band edge. If the energy gap for silicon is 1.1eV, is • this sample • A. p-type • B. n-type • C. intrinsic

  32. SUMMARY INFLUENCE OF TEMPERATURE ON CARRIER CONCENTRATIONS For intrinsic semiconductors the carrier concentrations increase steadily as T increases. In Si, ni is small below 400K but increases rapidly above this temperature.

  33. For extrinsic semiconductors the concentration vs. T plot has three regions: 1. Ionisation region – the impurities are being ionised 2. Extrinsic region – all the impurities are ionised; few electron hole pairs 3. Intrinsic region – electron-hole pairs produced in large numbers – material effectively becomes intrinsic • There is a transition temperature below which devices must operate, otherwise pn junctions will be lost. 33

  34. MAJORITY AND MINORITY CARRIERS • Majority carriers - electrons in n-type and holes in p-type • Minority carriers - electrons in p-type and holes in n-type  np = ni2  In n-type: nn≈ ND ; pn≈ ni2 / ND  In p-type: pp≈ NA ; np≈ ni2 / NA

  35. THE FERMI-DIRAC DISTRIBUTION FUNCTION • This is a statistical function giving the probability that a state at energy E is occupied by an electron • EF is the FERMI LEVEL - the energy at which a state has a 50-50 chance of occupancy.

  36. The Fermi Level is approximately in the middle of the gap for an intrinsic semiconductor. • The position of the Fermi Level is a measure of how n-type or p-type the material is. • A degenerate semiconductor is one which is very heavily doped.

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