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Electrical Engineering 2. Lecture 9. Microelectronics 2. Dr. Peter Ewen. (Room G08, SMC; email - pjse). Epitaxial growth. Fig. 40. Wafers. 1000 °C. Fig. 42. Diffusion. N D > N A – n-type N A > N D – p-type. N A >N D. N D >N A. N A =N D.
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Electrical Engineering 2 Lecture 9 Microelectronics 2 Dr. Peter Ewen (Room G08, SMC; email - pjse)
Epitaxial growth Fig. 40 Wafers 1000°C
Fig. 42 Diffusion ND > NA – n-type NA > ND – p-type NA>ND ND>NA NA=ND Diffusion of acceptors into an n-type wafer (substrate).
Ion Implantation • Dose • Ionenergy Fig. 43
Fig. 44 • Ion Implantation • Advantages: • Less sideways spreading than for diffusion. • Doping concentration and depth can be precisely controlled. • Low temperature process. Diffusion Implantation
Oxidation Fig. 45 SiO2 SiO2 Layers: • Used as a mask – impervious to dopant • Protect surface • Insulate – metal interconnects can be run over top • Gate insulator in MOS (Metal Oxide Semiconductor) transistors Si Wafer
Lithography and etching Mask U.V. light Fig. 46 Resist SiO2 Silicon wafer positive resist (more soluble) negative resist (less soluble) Etch SiO2
LECTURE 9 PN JUNCTION DIODE Fabrication • Principles of operation • formation of depletion region • energy barrier • carrier flows The diode equation • Diode I-V characteristic
Metal plate (cathode pin) Fig. 47 (Discrete) Diode Fabrication Al wire to anode pin Gas of boron atoms SiO2 p-type p-type p-type ~500 m n-type Aluminium Diode 3 Diode 2 Diode 1
SiO2 p-type n-type Aluminium Fig. 48 anode pin cathode pin
Si Si Si Si Si Si Si n-type Si Fig. 49 Si + Si Si P Donor atom Si
Si Si Si Si Si Si Si p-type Si Si - Si Si B Acceptor atom Si
PN Junction Formation - - - - - - - - - - - + + + + + + + + + + + Fig. 50 p-type Before “contact” n-type + - + - + - + - + - + - + - + - + - + - Si atom mobile hole mobile (free) electron + - fixed, ionised acceptor atom fixed, ionised donor atom Hole concentration Electron concentration initial “contact” electron diffusion hole diffusion Distance
n-type - - - - - - - - - - + + + + + + + + + + p-type + - + - + - + - + - + - + - + - + - + - Carrier concentration hole diffusion electron diffusion electrons holes Distance Depletion region
Before “contact” After “contact” - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + - - + + - + ΔV - + E = – - + - + - + - + - + Δx - + junction n-type p-type + - + - + - + - + - + - + - + - + - + - -ve +ve E Potential, V depletion region VB, Barrier Potential Distance
The depletion of mobile charge around the junction is a result of • Diffusion • Ionization • Recombination • A and C • All three of A, B, and C
- - - - - - - - - - + + + + + + + + + + - - - - - - - - - - + + EC EF EV EC EF EV + + + + + + + + Fig. 51 junction n-type p-type E Potential barrier, VB ΔE = qΔV Energy barrier, eVB Situation after “contact” depletion region
2. Barrier potential The Fermi level, EF, is 0.25 eV below the C.B. edge, EC, on the n-type side of a Si pn junction and 0.16 eV above the V.B. edge, EV, on the p-type side. Determine the barrier potential, VB, given that Eg for Si is 1.1 eV.
2. Barrier potential EC EF EV EC EF EV EC EF EV p-type n-type 0.25eV Eg = 1.1 eV 0.16eV Before “contact” After “contact” To equalise the positions of the Fermi levels on the p-type and n-type sides of the junction the band structures have to move up/down relative to one another by the difference in energy between the two levels, ΔE:
To get the potential difference associated with this change in energy, remember that if a charge q passes through a potential difference ΔV its energy changes by an amount ΔE = qΔV (The ‘e’ on the top line converts eV to joules.)
Electron flows across a pn junction under zero bias –E + Fig. 52 p-type n-type F = -eE Electrons Drift current Diffusion current Electrons Electron energy eVB For zero applied bias the drift and diffusion flows balance – there is no net current across the junction. Eg depletion region
pn junction under applied Forward Bias Forward bias => p-type +ve w.r.t. n-type Zero bias Fig. 53 V VB + - + - + - + - + – n p • Diffusion current increases • Drift current unaffected • => large forward current flows Potential VB VB-V Distance
pn junction under applied Reverse Bias Reverse bias => p-type -ve w.r.t. n-type Zero bias Fig. 54 V VB - + - + - + - + + – n p • Diffusion current shut off • Drift current unaffected • => small reverse current flows Potential VB+V VB Distance
Effect of bias on width of the depletion region 0 Fig. 55 -2 -14 Reverse bias (p-type -ve w.r.t. n-type) Volts -4 -12 -6 -10 -8 V VB - + - + - + - + - + - + - + - + + – n p Depletion region widens Potential VB+V VB Distance
Effect of bias on width of the depletion region 0 Fig. 55 0.1 0.7 Forward bias (p-type +ve w.r.t. n-type) Volts 0.2 0.6 0.3 0.5 0.4 V VB + - + - + - + - + – n p - + - + Depletion region narrows Potential VB VB-V Distance
THE DIODE EQUATION is the IDEALITY FACTOR – accounts for recombination in the depletion region. • kT/e = 26mV at 300K – for V >> 26mV the forward current increases exponentially with V. • Reverse current rapidly saturates at –Is as V decreases below 0V. • Is is due to minority carriers drifting across junction, so is very sensitive to temperature.
The Diode Characteristic Fig. 56 Approximations: (a) Ideal diode ( perfect switch) (b) Ideal diode + offset (to model cut-in voltage, V0) (c) Ideal diode + offset + resistor (to give a finite slope to the “on” region) I dI/dV = R-1 V V0 V V V I R V0 ideal diode
A more accurate characteristic is obtained by plotting the diode equation: I / mA 5 4 3 2 1 Fig. 57 V0 Is 0.4 0.8 V / volts -0.5 -1 -1.5 -2 -2.5 -1 -2 -3 -4 -5 N.B. Is depends on temperature – for Si, Is doubles for every 6°C rise in temperature. I / nA I / mA
3. Diode equationThe currents flowing through a Si diode are found to be -2.5 nA and 35 mA at voltages of -10 V and 0.85 V respectively. Determine the ideality factor, , for this diode.
3. Diode equation What is the value for Is? I / mA 50 40 30 20 10 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 V / volts 1 2 Is -10 -20 -30 -40 -50 Is = |I(-10V)| = 2.5nA I / mA
SUMMARY • THE PN JUNCTION DIODE • FABRICATION • n-type wafer (higher ) for cathode • oxidation/lithography/etching SiO2 mask • diffuse in p-type dopant for anode • Al contacts formed by evaporation SiO2 p-type n-type Aluminium
- - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + - - + + - + - + - + - + - + - + - + - + • OPERATION • Donor and acceptor atoms give rise to fixed charges in the lattice • DEPLETION REGION forms around junction - this region is depleted of mobile carriers • space charge in the depletion region causes an electric field which gives rise to an energy or potential barrier ( VB ) Before “contact” After “contact” junction n-type p-type + - + - + - + - + - + - + - + - + - + - -ve +ve depletion region E
Size of VB is fixed by the difference in the Fermi levels on the n- and p-type sides • Because of the concentration differences: Electrons diffuse n p; Holes diffuse p n • Minority carriers drift in opposite direction: Electrons drift p n; Holes drift n p
EFFECTS OF BIAS • Under zero bias all these carrier flows cancel so that there is no net current flowing • Under forward bias (p-type +ve w.r.t. n-type): • barrier height reduced • diffusion current increases • drift current remains same • hence forward current flows • Under reverse bias (p-type -ve w.r.t. n-type): • barrier height increased • diffusion current decreases to zero • drift current remains same • hence small reverse current flows
Width of depletion region depends on applied bias: • width increases for increasing reverse bias • width decreases for increasing forward bias • The Diode Equation: is the IDEALITY FACTOR – accounts for recombination in the depletion region. • For V >> 26mV the forward current increases exponentially with V. • Reverse current rapidly saturates at -Is as V decreases below 0V. • Is is very sensitive to temperature.