1 / 37

Fei Hu Department of Electrical and Computer Engineering, Auburn University, AL 36849

Power estimation techniques and a new glitch filtering effect modeling based on probability waveform. Fei Hu Department of Electrical and Computer Engineering, Auburn University, AL 36849. Outline. Introduction Different Levels of power estimation Gate-level Probabilistic Approach

loren
Télécharger la présentation

Fei Hu Department of Electrical and Computer Engineering, Auburn University, AL 36849

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Power estimation techniques and a new glitch filtering effect modeling based on probability waveform Fei Hu Department of Electrical and Computer Engineering, Auburn University, AL 36849 Fei Hu, ELEC6970 Fall 2004

  2. Outline • Introduction • Different Levels of power estimation • Gate-level Probabilistic Approach • Signal Probability • Transition probability • Transition density • Probability waveform • A new glitch filtering method • Based on Probability waveform • The idea and examples • Preliminary experimental results • Summary Fei Hu, ELEC6970 Fall 2004

  3. Introduction • Power estimation is critical to IC (low power) design • Total power consumption must be estimated during the design phase. • Helps to find the hot-spot which may lead to the failure • Levels of power estimation • Transistor Level • Gate Level • RTL Level • Behavior Level • Software Level • Two approaches • Simulation based • Non-simulative Fei Hu, ELEC6970 Fall 2004

  4. Simulation based Approach • Transistor Level Simulation • Circuit level • SPICE • Solving a large matrix of node current using the Krichoff’s Current Law (KCL) • Basic components include resistor, capacitor, inductors, current sources and voltage sources. • Diodes and transistors are modeled by basic components • PowerMill • Table based device model • Even driven timing simulation • 2-3 orders of magnitude faster than Spice Fei Hu, ELEC6970 Fall 2004

  5. Simulation based Approach • Transistor Level Simulation -continued • Switch level • Model transistor as a on-off switch with a resistor • Short circuit power can be accounted by observing the time in which the switches form a power-ground path • Gate Level Simulation • Basic components, logic gates • Logic simulation to find switching activity, P=1/2CV2factive • Monte Carlo simulation, statistical method • Each sample has N Random input vector • Energy consumption has a normal distribution • Stopping criterion derived from sample average and sample standard deviation Fei Hu, ELEC6970 Fall 2004

  6. Simulation based Approach • RTL level simulation • Basic components, register, adder, multiplier, etc. • RT-level simulation collect input statistics of each module • Macro-modeling of each component based on simulation • Simulating the component with random input • Fitting a multi-variable regression curve (power macro model equation) using a least mean square error fit. Fei Hu, ELEC6970 Fall 2004

  7. High level estimation • Most of the high level power prediction use profiling and simulation techniques to address data dependencies • Behavior level estimation • No much RT (or lower) level circuit structure information available • Information theoretic models • Total capacitance estimated based on output entropy • Average switching activity for each line, approximated by ½ its entropy • Complexity based models, “equivalent gate” • Software level estimation • Energy consumption by a application program • Instruction level power macromodel • Profile-driven program synthesis, RT level simulation Fei Hu, ELEC6970 Fall 2004

  8. Non-simulative Approach • Gate level probabilistic approach • Concepts • Signal Probability • Transition probability • Transition density • Probability waveform • Factors • Spatial, temporal correlation • Zero delay or real delay (glitch power) • With or w/o glitch filtering Fei Hu, ELEC6970 Fall 2004

  9. Gate level probabilistic approach - concepts • Signal Probability • Ps(x), the fraction of clock cycles in which the steady-state value of signal x is high • Spatial independence, the logic value of an input node is independent of the logic value of any other input node • Under spatial independence assumption, signal probability for simple gate is: • NOT: c=a, Ps(c)=1-Ps(a) • AND: c=ab, Ps(c)=Ps(a)Ps(b) • OR: c=a+b, Ps(c)=1-[1-Ps(a)][(1-Ps(b)] Fei Hu, ELEC6970 Fall 2004

  10. Signal probability w/ spatial correlation • Example • Signal correlation • S. Ercolani, M. Favalli, M. Damiani, P. Olivo, and B. Ricco. Estimate of signal probability in combinational logic networks. In Proceedings of the First European Test Conference, pages 132–138, 1989. • Ps(x1,x2)=Ps(x1)Ps(x2)Wx1,x2 • Approximate higher order correlation with pairwise correlations Ps(a)=0.5 Ps(c)=0.5x0.5=0.25 ? Ps(c)=0 Ps(b)=0.5 Fei Hu, ELEC6970 Fall 2004

  11. Signal probability w/ spatial correlation • Global OBDD • Ordered binary decision diagram corresponding to the global function of a node (function of node in terms of circuit input) • Give exact signal correlation • Example, function y=x1x2+x3 • Ps(y)=Ps(x1)Ps(fx1)+Ps(x1)Ps(fx1) • Traversal from bottom to top to derive signal probability x1 1 0 x2 0 1 x3 1 0 0 1 Fei Hu, ELEC6970 Fall 2004

  12. Gate level probabilistic approach - concepts • Transition probability • Pt(x), average fraction of clock cycles in which the steady state value of x is different from its initial value • Temporal independence, the signal value of a node at clock cycle i is independent to its signal value at clock cycle i-1 • Under temporal independence assumption, transition probability Pt(x)=2Ps(x)[1-Ps(x)] Fei Hu, ELEC6970 Fall 2004

  13. Transition probability w/ spatial temporal correlations • R. Marculescu, D. Marculescu, and M. Pedram. Logic level power estimation considering spatiotemporal correlations. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 294–299, Nov. 1994. • Zero delay assumption, lag one markov chain • Pt(x) ≠2Ps(x)[1-Ps(x)] • Transition correlations • Used to describe the spatial temporal correlation between two signals in consecutive clock periods • TCxy(ij,mn)=P(xi->j ,ym->n)/P(xi->j)P(ym->n)i,j,m,n  {0,1} • Propagate transition probability from PI • OBDD based procedure • Global or local OBDD Fei Hu, ELEC6970 Fall 2004

  14. Gate level probabilistic approach - concepts • Transition density • D(x), average number of transitions a logic signal x makes in a unit time (one clock cycle) • Boolean difference, if y is a function depending on x then and • Under differential delay assumption, no two signal has transition happened at the same time. • Under spatial independence assumption • Considers glitch power • No glitch filtering effect Fei Hu, ELEC6970 Fall 2004

  15. Transition density • Example, c=ab • Depending on delay model above result can be true or false P(c/a)=P(b)=0.5 P(c/b)=P(a)=0.5 D(c)=0.5*D(a)+0.5*D(b) =0.5*0.5+0.5*0.5 =0.5 Ps(a)=0.5 D(a)=Pt(a)=2*0.5*0.5 =0.5 d d Ps(b)=0.5 D(b)=Pt(b)=2*0.5*0.5 =0.5 Fei Hu, ELEC6970 Fall 2004

  16. Transition density Fei Hu, ELEC6970 Fall 2004

  17. Gate level probabilistic approach - concepts • Probability waveform • F. N. Najm, R. Burch, P. Yang, and I. N. Hajj. CREST - a current estimator for cmos circuits. In Proceedings of IEEE International Conference on Computer-Aided Design, pages 204–207, Nov. 1988 • A sequence of value indicating the probability that a signal is high for certain time interverals, and the probability that it makes low-to-high at specific time point • Real delay model • Propagation of probability waveform deals with probability of making transitions • Transition density is the sum of all probability of transitions • CREST assumes spatial independence Fei Hu, ELEC6970 Fall 2004

  18. Probability waveform Pc01(t1)=Pa01(t1) Pb01(t1)+ Pa01(t1) Pb11(t1)+ Pa11(t1) Pb01(t1) =0.1*0.1+0.1*0.3+0.3*0.1 =0.07 • Example, c=ab P 0.1 0.2 0.5 P 0.2 0.1 0.07 0.16 0.5 a t1 t2 0.07 0 0.16 c b t1 t2 P Pc10(t1)=Pa10(t1) Pb10(t1)+ Pa10(t1) Pb11(t1)+ Pa11(t1) Pb10(t1) =0.2*0.2+0.2*0.3+0.3*0.2 =0.16 0.1 0.2 0.5 0.2 0.1 t1 t2 Pc11(t1)=Pc1(t1-)- Pc10(t1) Pc1(t1+)=Pc01(t1)+Pc11(t1) Fei Hu, ELEC6970 Fall 2004

  19. Probability waveform • Tagged Probability waveform • Divide probability waveform into 4 tagged waveform depending the steady state signal values • Probability waveforms are for one clock period • Use transition correlation of steady state signal to approximate spatial temporal correlation between two inputs Wa,bxy,wz=Pa,bxy,wz /Paxy Pbwz • Transition correlation can be obtained from zero delay logic simulation • Bit-parallel simulation • Glitch filtering effect considered Fei Hu, ELEC6970 Fall 2004

  20. Tagged probability waveform • Example of decomposition 11 0.35 0.15 0.15 t1 t2 01 0.15 P 11 0.1 0.05 0.2 0.1 0.5 0.2 0.1 t1 t2 10 t1 t2 0.1 0.15 0.05 t1 t2 00 0.35 t1 t2 Fei Hu, ELEC6970 Fall 2004

  21. Tagged probability waveform • Propagation of waveform • Similar to untagged waveform • Two input gates, 16 combinations of tagssum up waveform with same resulting tags, 4 output waveform • Example for an AND gate Pc,uv01(t1)+=[Pa,xy01(t1) Pb,wz01(t1)+Pa,xy01(t1) Pb,wz11(t1)+Pa,xy11(t1) Pb,wz01(t1)] * Wa,bxy,wz Pc,uv10(t1)+=[Pa,xy10(t1) Pb,wz10(t1)+Pa,xy10(t1) Pb,wz11(t1)+Pa,xy11(t1) Pb,wz10(t1)] * Wa,bxy,wz uv, xy, wz are tags, (00,01,10,11) uv = xy and wz here Fei Hu, ELEC6970 Fall 2004

  22. Tagged probability waveform • Glitch filtering scheme • If pulse width less than gate inertial delay, it is subject to glitch filtering • For time t1 for at time point t2, t2-t1<d Pc,uv01(t1)-= Pa,xy01(t1) Pb,wz10(t2)Wa,bxy,wzPc,uv10(t2)-= Pa,xy01(t1) Pb,wz10(t2)Wa,bxy,wz • Limitations • Rough filtering, Not exact description for pulse • Can’t filter glitch coming from one input Fei Hu, ELEC6970 Fall 2004

  23. A new glitch filtering scheme • Why important • Glitch power can be a significant portion of total switching power • Bad filtering scheme gave errors • Basic idea: look at the exact condition for a pulse • P(c has transition at t1 and t2)=P(a has 0->1 at t1, b has 1->0 at t2) • Tagged waveform was correct ? a c t1 0 b t1 t2 t2 Fei Hu, ELEC6970 Fall 2004

  24. New glitch filtering scheme • In probability waveform (spatial independence) • P(c has 0->1 transition at t1 and 1->0 at t2)= P{(a,b) at t1 is (01,11) or (11,01) or (01,01) and (a,b) at t2 is (10,11) or (11,10) or (10,10)} P P 0.1 0.1 0.2 0.2 0.5 0.5 P 0.2 0.2 0.1 0.1 0.07 0.16 0.5 a t1 t1 t2 t2 0.07 0 0.16 c b t1 t2 P P 0.1 0.1 0.2 0.2 0.5 0.5 0.2 0.2 0.1 0.1 t1 t1 t2 t2 Fei Hu, ELEC6970 Fall 2004

  25. New glitch filtering and t1 t2 t1,t2 • Pc01,10(t1,t2) is a sum of 9 terms • Example term: Pa01,10(t1,t2)Pb11,11(t1,t2) • This sum Pc01,10(t1,t2) is subtracted from Pc01(t1), Pc10(t2) • Similarly, Pc10,01(t1,t2) is subtracted from Pc10(t1), Pc01(t2) Fei Hu, ELEC6970 Fall 2004

  26. New glitch filtering • Keep track of Pcij,kl(t1,t2) for every signal during the waveform propagation in the form of correlation coefficient • wcij,kl(t1,t2)= Pcij,kl(t1,t2)/Pcij(t1) Pckl(t2) • After the filtering • If t2-t1<d • Pc01,10(t1,t2) set to 0 • Pc01,11(t1,t2) set to Pc01(t1) • … • Otherwise • Pcij,kl(t1,t2) = wcij,kl(t1,t2)* P’cij(t1) P’ckl(t2) • P’cij(t1), P’ckl(t2) are probability of transition at t1,t2 after filtering Fei Hu, ELEC6970 Fall 2004

  27. New glitch filtering scheme • In tagged probability waveform • Consider spatial correlation • Approximate spatial correlation with steady state signal transition correlations, Wabxy,wz • Pc,uv01,10(t1,t2) is a sum of sub-sum of 9 terms • Each sub-sum is corresponding to a pair of input waveform • Example term in sub-sum Pa,xy01,10(t1,t2)Pb,wz11,11(t1,t2)*Wabxy,wz • Pc,uv01,10(t1,t2) is subtracted from Pc,uv01(t1), Pc,uv10(t2) if t2-t1<d • Similarly, Pc,uv10,01(t1,t2) is subtracted from Pc,uv10(t1), Pc,uv01(t2) Fei Hu, ELEC6970 Fall 2004

  28. Preliminary experimental results • Small circuit with tree structure • No spatial correlations • Randomly specified delay • Input signal probability =0.5 • Results by probability waveform compared to logic simulation under random input vectors Fei Hu, ELEC6970 Fall 2004

  29. Preliminary results – tree circuit Fei Hu, ELEC6970 Fall 2004

  30. Preliminary results – reconvergent fanout • Small circuit with reconvergent fanout • Introduce spatial correlations • Randomly specified delay • Input signal probability =0.5 • Results by probability waveform compared to logic simulation under random input vectors Fei Hu, ELEC6970 Fall 2004

  31. Preliminary results – reconvergent fanout Fei Hu, ELEC6970 Fall 2004

  32. Preliminary results – benchmark circuits • ISCAS 85’ benchmark • Input signal probability 0.5 • Logic simulation 40,000 random vectors • Error statistics • Large percentage error for low activity node – exclude error for node activity less than 0.1 • Total energy estimated from transition density and load capacitance. CL is proportional to fanout of a gate Fei Hu, ELEC6970 Fall 2004

  33. Fei Hu, ELEC6970 Fall 2004

  34. Preliminary results – benchmark circuits • Observations • Single probability waveform does not perform better than “Tag + new” for benchmark circuits • New glitch filtering improves node error std dev. – error more even distributed • New glitch filtering improves overall and node estimation accuracy in some cases • In some other case, it tends to give worse total energy estimation • Filtering is based on tagged probability waveform • Waveform before filtering is underestimated, a correct amount of subtraction by filtering effect will lead to overall underestimated value • “Tag” tends to underestimate the amount of subtraction by filtering effect • Estimation speed • “Prob + new” – 10~30 times speed up comparing to logic simulation • “Tag” – 200 times speed up • “Tag + new” – 1~5 speed up Fei Hu, ELEC6970 Fall 2004

  35. Future work • Improve the estimation accuracy by improving the estimation of waveform before filtering • Need to consider more on spatial correlations • Take care of special case that spatial correlation between two signal is poorly approximated by steady state transition correlation • Improving the estimation speed • The new method of glitch filtering take too much time because of it’s propagation of Pcij,kl(t1,t2) • Only 1~5 times speed up than logic simulation • Software optimization has to be done Fei Hu, ELEC6970 Fall 2004

  36. Summary • Introductions to different Levels of power estimation • Gate-level Probabilistic Approach • Signal Probability • Transition probability • Transition density • Probability waveform • A new glitch filtering method • Based on Probability waveform • A more accurate glitch filtering • Preliminary experimental results shows the potential of the new method • Problems are to be tackled • Questions ? Fei Hu, ELEC6970 Fall 2004

  37. Thank You ! For questions and comments, please contact me at hufei01@auburn.edu Fei Hu, ELEC6970 Fall 2004

More Related