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Adders

Adders. Used to perform addition, subtraction, multiplication, and division (sometimes) Half-adder adds rightmost ( least significant ) bit Full-adder adds all other bits, since a 1 may be carried into it. Use carry-out from one adder as the carry-in for the next adder

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Adders

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  1. Adders • Used to perform addition, subtraction, multiplication, and division (sometimes) • Half-adder adds rightmost (least significant) bit • Full-adder adds all other bits, since a 1 may be carried into it. Use carry-out from one adder as the carry-in for the next adder • Combinational circuit (no memory)

  2. Half-Adder • A Half Adder (HA) is a 2-input, 2-output combinational circuit that adds the inputs and produces a Sum and a Carry • The Boolean expressions and the circuit for the Sum S and the carry C are given below: • Half adder • Inputs two 1-bit values, X and Y • Outputs their 2-bit sum as bits C and S • C is carry • S is the sum

  3. Result Carry Half-Adder • Only this circuit is a Half-Adder • Other circuits may be equivalent, however

  4. Half-Adder

  5. Half-Adder • How to know a circuit is equivalent to half-adder ? • Circuit is equivalent to a half-adder if both truth tables have identical output • Cannot be used if there could be a carry-in bit • So used to add least significant (rightmost) bit. • Very important circuit in computers. • Addition is very common • Half-adder is found in every computer, calculator, digital watch…

  6. Binary Full Adder • A Full Adder (FA) is a 3-input, 2-output • combinational circuit that adds the inputs and produces a Sum and a Carry • The third input can be perceived as the carry from a previous addition • The Boolean expressions and for the Sum S and • the carry C, obtained from their K-Maps, are given below:

  7. Multiplexer A multiplexer (MUX) is a device that accepts data from one of many input sources for transmission over a common shared line. To achieve this the MUX has several data lines and a single output along with data-select inputs, which permit digital data on any one of the inputs to be switched to the output line. The logic symbol for a 1-of-4 data selector/ multiplexer is shown below, along with its associated table. Logic symbol for 1-of-4 multiplexer

  8. Active high MUX

  9. Active Low MUX

  10. Table of Operation Note that if a binary zero appears on the data-select lines then data on input line D0 will appear on the output. Thus, data output Y is equal to D0 if and only if S1=0 and S0=0

  11. Similarly, the data output is equal to D1, D2 and D3 for             ,               and             , respectively. Thus the total multiplexer logic expression, formed from ORing terms is

  12. Larger MUX • Technique: use hierarchies of smaller components • Example: creating 4x1 mux from 2x1 mux • Will create a 2-level mux tree • First level takes the initial inputs • The results from the first level are fed into the second level

  13. Hierarchy Approach • Technique • Divide the truth table into equal sections • Number of sections given by type of second-level MUX • If the second-level MUX is 2x1 then need 2 sections in the TT Section 1 Section 2

  14. Hierarchy Approach • Technique • Connect the outputs corresponding to individual sections of the TT to the data lines of the individual first-level MUXs Input 0 Outputs from Section 1 of Truth Table 2x1 Mux Input 1 Outputs from Section 2 of Truth Table 2x1 Mux Input 2 Input 3

  15. Hierarchy Approach • Technique • Connect the outputs of the first-level MUXs to the data lines of the second-level MUX following the order of the sections Input 0 2x1 Mux Input 1 2x1 Mux 2x1 Mux Input 2 Input 3

  16. Hierarchy Approach • Technique • Connect the outputs of the first-level MUXs to the data lines of the second-level MUX following the order of the sections Input 0 2x1 Mux Input 1 2x1 Mux 2x1 Mux Input 2 Input 3

  17. 4-to-1 MUX made from 2-to-1 MUXs

  18. Decoders • A decoder: • Accepts a Boolean value (number) and activates the corresponding output line • All other lines are deactivated • For n inputs there are 2n output lines • Each possible input value corresponds to an output line

  19. Decoders Motivation (one example) CPU needs to select channel => assign address to each device Need a way to activate device. MEMORY PRINTER COMMUNICATION CHANNEL CPU MOUSE DISPLAY

  20. Decoders ACTIVATION LINE Motivation CPU needs to select channel => assign address to each device Need a way to activate device. MEMORY ADDRESS CODE PRINTER ADDRESS DECODER CPU MOUSE DISPLAY

  21. A i = 0 B i = 1 1, iff A,B is 01 i = 2 1, iff A,B is 10 i = 3 1, iff A,B is 11 Decoder • An n input decoder has 2n outputs. • Outputi is 1 iff the binary value of the n-bit input is i. • At any time, exactly one output is 1, all others are 0. 1, iff A,B is 00

  22. Decoder with Enable • In general, attach m-enabling circuits to the outputs • See truth table below for function • Note use of X’s to denote both 0 and 1 • Combination containing two X’s represent four binary combinations • Alternatively, can be viewed as distributing value of signal EN to 1 of 4 outputs • In this case, called ademultiplexer

  23. 2-to-4 decoder with active high enable

  24. 2-to-4 decoder with active low enable

  25. Encoders • An encoder: • For 2n inputs there are n output lines • Outputs the Boolean value corresponding to the input line number • There is a special output line V that indicates whether any input lines are active.

  26. Encoder

  27. Priority Encoder

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