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VLSI Arithmetic Adders

VLSI Arithmetic Adders. Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel. Digital Computer Arithmetic belongs to Computer Architecture, however, it is also an aspect of logic design.

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VLSI Arithmetic Adders

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  1. VLSI ArithmeticAdders Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel

  2. Digital Computer Arithmetic belongs to Computer Architecture, however, it is also an aspect of logic design. The objective of Computer Arithmetic is to develop appropriate algorithms that are utilizing available hardware in the most efficient way. Ultimately, speed, power and chip area are the most often used measures, making a strong link between the algorithms and technology of implementation. Introduction Computer Arithmetic

  3. Addition Multiplication Multiply-Add Division Evaluation of Functions Multi-Media Basic Operations Computer Arithmetic

  4. Addition of Binary Numbers

  5. Addition of Binary Numbers Full Adder. The full adder is the fundamental building block of most arithmetic circuits:   The sum and carry outputs are described as: ai bi Full Adder Cout Cin si Computer Arithmetic

  6. Inputs Outputs ci ai bi si ci+1 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Addition of Binary Numbers Propagate Generate Propagate Generate Computer Arithmetic

  7. Full-Adder Implementation Full Adder operations is defined by equations: Carry-Propagate: and Carry-Generate gi One-bit adder could be implemented as shown Computer Arithmetic

  8. High-Speed Addition One-bit adder could be implemented more efficiently because MUX is faster Computer Arithmetic

  9. The Ripple-Carry Adder Computer Arithmetic

  10. The Ripple-Carry Adder From Rabaey Computer Arithmetic

  11. Inversion Property From Rabaey Computer Arithmetic

  12. Minimize Critical Path by Reducing Inverting Stages From Rabaey Computer Arithmetic

  13. Ripple Carry Adder Carry-Chain of an RCA implemented using multiplexer from the standard cell library: Critical Path Oklobdzija, ISCAS’88 Computer Arithmetic

  14. Manchester Carry-Chain Realization of the Carry Path • Simple and very popular scheme for implementation of carry signal path Computer Arithmetic

  15. Original Design T. Kilburn, D. B. G. Edwards, D. Aspinall, "Parallel Addition in Digital Computers: A New Fast "Carry" Circuit", Proceedings of IEE, Vol. 106, pt. B, p. 464, September 1959. Computer Arithmetic

  16. Carry-Skip Adder MacSorley, Proc IRE 1/61 Lehman, Burla, IRE Trans on Comp, 12/61 Computer Arithmetic

  17. Carry-Skip Adder Bypass From Rabaey Computer Arithmetic

  18. Carry-Skip Adder:N-bits, k-bits/group, r=N/k groups Computer Arithmetic

  19. Carry-Skip Adder k Computer Arithmetic

  20. Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

  21. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Computer Arithmetic

  22. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) 6 5 5 4 4 3 3 D=9 1 1 Any-point-to-any-point delay = 9 D as compared to 12 D for CSKA Computer Arithmetic

  23. Delay Calculation for Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Delay model: Computer Arithmetic

  24. Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Variable Group Length Oklobdzija, Barnes, Arith’85 Computer Arithmetic

  25. Carry-chain of a 32-bit Variable Block Adder(Oklobdzija, Barnes: IBM 1985) Variable Block Lengths • No closed form solution for delay • It is a dynamic programming problem Computer Arithmetic

  26. Delay Comparison: Variable Block Adder VBA CLA VBA- Multi-Level Computer Arithmetic

  27. VLSI ArithmeticLecture 4 Prof. Vojin G. Oklobdzija University of California http://www.ece.ucdavis.edu/acsel

  28. Carry-Lookahead Adder(Weinberger and Smith, 1958) ARITH-13: Presenting Achievement Award to Arnold Weinberger of IBM (who invented CLA adder in 1958) Ref: A. Weinberger and J. L. Smith, “A Logic for High-Speed Addition”, National Bureau of Standards, Circ. 591, p.3-12, 1958. Computer Arithmetic

  29. CLA Definitions: One-bit adder Computer Arithmetic

  30. CLA Definitions: 4-bit Adder Computer Arithmetic

  31. Carry-Lookahead Adder: 4-bits Gj Pj Computer Arithmetic

  32. Carry-Lookahead Adder One gate delay D to calculate p, g One D to calculate P and two for G Three gate delays To calculate C4(j+1) Compare that to 8 D in RCA ! Computer Arithmetic

  33. Carry-Lookahead Adder(Weinberger and Smith) Additional two gate delays C16 will take a total of 5D vs. 32D for RCA ! Computer Arithmetic

  34. 32-bit Carry Lookahead Adder Computer Arithmetic

  35. Carry-Lookahead Adder(Weinberger and Smith: original derivation, 1958 ) Computer Arithmetic

  36. Carry-Lookahead Adder(Weinberger and Smith: original derivation ) Computer Arithmetic

  37. Carry-Lookahead Adder (Weinberger and Smith)please notice the similarity with Parallel-Prefix Adders ! Computer Arithmetic

  38. Carry-Lookahead Adder (Weinberger and Smith)please notice the similarity with Parallel-Prefix Adders ! Computer Arithmetic

  39. Motorola: CLA Implementation Example A. Naini, D. Bearden and W. Anderson, “A 4.5nS 96b CMOS Adder Design”, Proceedings of the IEEE Custom Integrated Circuits Conference, May 3-6, 1992.

  40. Critical path in Motorola's 64-bit CLA 4.8nS 1.05nS 1.7nS 3.75nS 2.7nS 2.0nS 2.35nS Computer Arithmetic

  41. Motorola's 64-bit CLAconventional PG Block no better situation here ! carry ripples locally 5-transistors in the path Basically, this is MCC performance with Carry-Skip. One should not expect any better results than VBA. Computer Arithmetic

  42. Motorola's 64-bit CLAModified PG Block Intermediate propagate signals Pi:0 are generated to speed-up C3 still critical path resembles MCC Computer Arithmetic

  43. 3.9nS 1.8nS 2.2nS 3.55nS 2.9nS 3.2nS Motorola's 64-bit CLA Computer Arithmetic

  44. 3.9nS 4.8nS 1.8nS 1.05nS 2.2nS 1.7nS 3.55nS 3.75nS 2.9nS 3.2nS 2.7nS 2.0nS 2.35nS Computer Arithmetic

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