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Status Update on Level 1 Muon Trigger Development at the University of Arizona

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minya
12 diapositives · 269 Views · Sep 11, 2014

This report summarizes the current status of the L1 Muon group at the University of Arizona, highlighting key developments in the muon trigger system. A.C. and B.scintillator configurations, FPGA work, and timing issues are addressed. Ongoing efforts include debugging Muon FE interface problems, verifying timing correlation with collisions, and assessing trigger rates. Progress in software connections, monitoring GUIs, and implementation of real messages in hardware are noted. Access and shutdown tasks are specified, with focus on improving trigger sophistication and system reliability.

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Status Update on Level 1 Muon Trigger Development at the University of Arizona
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  1. Level 1 Muon Trigger Status Ken Johns University of Arizona for the L1 Muon Group

  2. L1MU Card Status

  3. L1MU Status • Triggers • A.C scintillator - 5/8 central • With simple A.C roads • A.B scintillator - 3/8 north • A.B roads shortly • A.B scintillator - 3/8 south • A.B roads shortly • A.C PDT centroid - central • TF timing now ok • Needs a small amount of FPGA work • A.C scintillator - c+n+s • Ready to go but region triggers better for studies • A.C scintillator.PDT - central • Dimuon A.C - central • Needs FPGA work • Dimuon A.C - c+n+s • Muon + Jet - c

  4. L1MU Status • Work in progress • Developing L1MU examine • Highest priority • Real messages implemented in hardware • Tracking down Muon FE - L1MU interface problems • Scope signals from L1MU are used to debug what the FE’s are sending • Understanding muon octant trigger rates • Some high rates due to hot counters • Others due to SFE or MTCxx electronics • Verifying that the Muon FE systems are timed in to the correct BC • By beam delay rate curves using collisions • By pulser triggers • Understanding and fixing L1MU MTCxx problems • Missing L1MU (and Muon) readout crates traced to spurious interrupts in MFC card • Completing software connection to COOR • Starting work on L1MU monitoring gui’s • Increasing sophistication of triggers • Continuing development of tsim_l1muo

  5. SFE-L1MU

  6. L1MU Decision Time All are < 3.3 ms (TF decision time) Does not include full trigger algorithms, MCON, or MCEN cards Results are encouraging but that doesn’t mean we won’t be screaming for every last ns at the end

  7. L1MU Trigger Rates

  8. L1MU Trigger Rates

  9. SFE Timing Use L1MU trigger rate to select which BC SFE’s send as BC #7 There is still some uncertainty given our less-than-perfect understanding of the SFE card.

  10. Access Tasks • Identify and fix bad channels • Implement control FPGA changes as needed • Install remaining “05” and “10” MTCxx cards • Test MCCM-MRC connection • Test MCON card

  11. Shutdown Tasks • Complete L1MU cabling (20% left) • Complete MCEN cabling (80% left) • Complete MCEN commissioning • Complete L1CFT-L1MU commissioning

  12. L1MU A.C Octant 1