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ARM CPUs

ARM CPUs. By: Team 2. ARM OS’s. Windows CE family Windows 8 iOS webOS Formerly called Palm Linux Android ChromeOS Ubuntu. RISC vs. CISC. RISC: Simple instructions More register memory CISC: Complex instructions Less register memory

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ARM CPUs

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  1. ARM CPUs By: Team 2

  2. ARM OS’s • Windows CE family • Windows 8 • iOS • webOS • Formerly called Palm • Linux • Android • ChromeOS • Ubuntu

  3. RISC vs. CISC • RISC: • Simple instructions • More register memory • CISC: • Complex instructions • Less register memory • Recently Mac moved from RISC to CISC, Microsoft on the other hand is supporting both CISC RISC

  4. Cache • Physically-Indexed and Physically-Tagged (PIPT) (Physical cache) • 32KB 2-way set-associative (Access Method) • Fixed line length of 64 bytes • ARM Cache and Write Buffer Organization • Volatile Memory Stallings, William. "Cache Memory." Computer Organization and Architecture: Designing for Performance. Upper Saddle River, NJ: Prentice Hall, 2010. 143-45. Print.

  5. Cache (continued) Processor Speed Range

  6. Cortex A15 • Word Size: • 32-bit • Register Size • Uniform 16 x 32-bit Register File • Address BUS Size: • 40 bits • RAM Addressable: • Up to 1TB • Clock Speed • 35,000 MIPS at 2.5 GHz • Data BUS Size: • 32-bit • Number and Type of Instructions: • Type: • A64 • # of Instructions: • 32 bit • Cache

  7. Cache (continued) "Meet ARM's Cortex A15: The Future of the IPad, and Possibly the Macbook Air | Cloudline | Wired.com." Wired.com. Conde Nast Digital. Web. 10 Apr. 2012. <http://www.wired.com/cloudline/2011/10/meet-arms-cortex-a15-the-future-of-the-ipad-and-possibly-the-macbook-air/>.

  8. Works Cited • "ARM Information Center." Web. 09 Apr. 2012. <http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438d/BABHAEIF.html>. • "Cortex-A Series." - ARM. Web. 09 Apr. 2012. <http://www.arm.com/products/processors/cortex-a/index.php>. • "RISC vs. CISC." WWW-CS-FACULTY & STAFF Home Page (12-Apr-1995). Web. 09 Apr. 2012. <http://www-cs-faculty.stanford.edu/~eroberts/courses/soco/projects/2000-01/risc/risccisc/>. • Stallings, William. "Cache Memory." Computer Organization and Architecture: Designing for Performance. Upper Saddle River, NJ: Prentice Hall, 2010. 143-45. Print. • "Meet ARM's Cortex A15: The Future of the IPad, and Possibly the Macbook Air | Cloudline | Wired.com." Wired.com. Conde Nast Digital. Web. 10 Apr. 2012. <http://www.wired.com/cloudline/2011/10/meet-arms-cortex-a15-the-future-of-the-ipad-and-possibly-the-macbook-air/>.

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