1 / 30

Announcements

Announcements. Assignment #2 is due today! Solution will be posted later this week. Tutorials and labs. Lecture slides and videos. No class next week! Midterm exam?. Lecture 7. Chapter 7. Input/Output ( Cont. ). Direct Memory Access.

roth-roth
Télécharger la présentation

Announcements

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Announcements • Assignment #2 is due today! • Solution will be posted later this week. • Tutorials and labs. • Lecture slides and videos. • No class next week! • Midterm exam?

  2. Lecture 7 Chapter 7. Input/Output(Cont.)

  3. Direct Memory Access • Interrupt driven and programmed I/O require active CPU intervention. • CPU tests and services a device  transfer rate is limited. • # of instructions are executed for every I/O  CPU is tied up. • DMA is the answer! • Additional module (hardware) on bus. • DMA controller takes over from CPU for I/O.

  4. DMA Operation • CPU tells DMA controller: • Read/Write. • Device address. • Starting address of memory block for data. • Amount of data to be transferred. • CPU carries on with other work. • DMA controller deals with transfer. • DMA controller sends interrupt when finished.

  5. DMA Transfer - Cycle Stealing • DMA controller transfers data from/to MM over the system bus. • DMA controller takes over bus for a bus cycle to transfer one word of data. • Can use the bus only when CPU is not using it, or • Forces CPU to suspend operation temporarily  DMA steals a bus cycle from the CPU cycle stealing. • Not an interrupt • CPU does not switch context. • CPU suspended just before it accesses bus • i.e. before an operand or data fetch or a data write. • Slows down CPU but not as much as CPU doing transfer.

  6. DMA and Interrupt Breakpoints During an Instruction Cycle

  7. DMA Configurations (1) • Single Bus, Detached DMA controller • Each transfer uses bus twice • I/O to DMA then DMA to memory • CPU is suspended twice

  8. DMA Configurations (2) • Single Bus, Integrated DMA controller. • Controller may support >1 device. • Each transfer uses bus once. • DMA to memory. • CPU is suspended once.

  9. DMA Configurations (3) • Separate I/O Bus • Bus supports all DMA enabled devices • Each transfer uses bus once • DMA to memory • CPU is suspended once

  10. I/O Channels • I/O devices getting more sophisticated. • e.g. 3D graphics cards. • I/O module becomes a processor. • CPU instructs I/O controller to do transfer (execute a program). • CPU directs the I/O processor to fetch and execute an I/O program in memory. • I/O controller does entire transfer • Improves speed • Takes load off CPU. • Dedicated processor is faster.

  11. I/O Channel Architecture – Selector channel • Channel controls multiple high-speed devices. • At any given time, it is dedicated to data transfer with only one of these devices. • Each device/set of devices is/are handled by a controller (I/O module).

  12. I/O Channel Architecture – Multiplexor channel • Can handle multiple low-speed devices at the same time. • A byte multiplexor accepts or transmits characters as fast as possible to multiple devices. • Example: 3 devices with different rates and individual streams A1A2A3A4 ...,B1B2B3B4 . . ., and C1C2C3C4 might result in the character stream A1B1C1A2C2A3B2C3A4 …

  13. I/O Computer • I/O module is a computer: processor and memory. • Large set of I/O devices can be controlled with minimal CPU involvement. • e.g., communication with interactive terminals.

  14. Chapter 8. Operating System Support

  15. What’s an OS? Why? • Operating system (OS) is a program that manages the computer’s resources, provides services for programmers, and schedule the execution of programs. • Scheduling and memory management are most relevant to computer organization. • OS: • Controls the execution of programs. • Acts as an interface between the computer user and the computer hardware. • Objectives: • Convenience: Making the computer easier to use. • Efficiency: Allowing better use of computer resources.

  16. OS as a User/Computer Interface • H/W and S/W can be viewed as layers. • End user sees an application. • Application is expressed in a programming language and developed by a programmer. • Utilities • System programs • Called by an application. • Frequently used functions like I/O, file management, program creation. • OS • Masks the details of H/W from the programmer. • Provides a convenient interface.

  17. OS Services • Program creation • Utility programs help programmer to create a program. • e.g., editors and debuggers. • Program execution • Loads data and instructions into MM. • Initializes I/O devices and files. • Prepares other resources. • Access to I/O devices • Takes care of details of I/O devices. • Controlled access to files • Understands I/O device and file format. • Protection is multi-user. • System access • Protects system and resources from unauthorized users. • Error detection and response • Memory error, device failure, overflow, access forbidden memory. • Accounting: Usage statistics, performance, and billing.

  18. O/S as a Resource Manager • OS is a computer program that manages computer’s resources. • It directs the CPU in the use of other system resources and in the timing of execution of other programs. • OS relinquishes control for CPU to do some useful work, and resumes control to prepare CPU to do the next piece. • Kernel: core of OS loaded in MM. • Controls access to I/O devices & files. • CPU management.

  19. Types of Operating Systems • Batch vs. interactive • Batch OS (rare) • User’s program is batched with other users’ and submitted by a computer operator. • After completion, results are printed out for the user. • Interactive OS • User interacts with the computer thru a keyboard/display. • User may communicate with the computer during the execution of a job. • Uniprogramming vs. multiprogramming • Uniprogramming: one program at a time. • Multiprogramming • CPU works on > 1 program at a time  keep it busy. • Programs loaded into MM, CPU switches among them.

  20. Early Systems • Late 1940s to mid 1950s. • No operating system  programs interact directly with hardware. • Console = display lights + toggle switches (input device) + printer. • Programs loaded via an input device. • Program halted by an error • Error is indicated by lights. • Programmer examine register and MM to find error cause. • Program completes  output on printer. • Two main problems: • Scheduling: sign-up sheet: reserve CPU time in multiples of 30-min slots. May finish early or error occurs. • Setup time: mounting/dismounting tapes, card decks. If an error occurs, start setup sequence over again.

  21. Simple Batch OS • CPUs expensive  maximize its utilization. • User has no direct access to CPU. • Users submit jobs to operator. • Operator batches jobs sequentially and places the batch on an input device. • Simple batch OS = Monitor. • Resident Monitor program: part of Monitor always in memory. • Monitor controls sequence of events to process batch. • When one job finishes, control returns to Monitor which reads next job from I/P device and loads it into memory. • Monitor handles scheduling.

  22. Job Control Language (JCL) • Special type of programming language that contains instructions to Monitor. • Usually denoted by $. • Example: user submitting a Fortran program. $JOB $FTN ... .. Some Fortran instructions $LOAD $RUN ... .. Some data $END • $FTN  Monitor loads compiler  translates program and saves on tape. • $LOAD  Monitor loads program into memory and transfers control to it.

  23. Desirable Hardware Features • Memory protection • User program must not alter the memory containing Monitor. • If happens, CPU H/W detects it and transfers control to the Monitor. Monitor stops job, print error message, and loads next job. • Timer • To prevent a job monopolizing the system. • If expires  interrupt and control goes to Monitor. • Privileged instructions • Only executed by Monitor. • If CPU encounters one by user program  interrupt. • e.g. I/O  prevents program from reading JCL from next job. Program requests Monitor to do I/O. • Interrupts • Allows Monitor to relinquish and regain control.

  24. Multiprogrammed Batch OS • I/O devices very slow compared to CPU. • Uniprogramming • One program at a time. • CPU executes  encounters I/O instruction  waits till it finishes. • When one program is waiting for I/O, another can use the CPU.

  25. Multiprogramming with Two Programs • Assume memory can hold OS (resident Monitor) and two programs. • When one job needs to wait for I/O, the processor can switch to the other job.

  26. Multiprogramming with Three Programs • Additional feature for multiprogrammed batch system: H/W that supports interrupts and DMA. • CPU can issue I/O command for a job and proceed with the execution of another job while the I/O is carried out by the device controller. • When the I/O operation is complete, CPU is interrupted and control is passed to ISR in OS. The OS will then pass control to another job.

  27. Time-Sharing OS • Allow users to interact directly with the computer. • i.e. Interactive • Like multiprogramming OS, handles multiple interactive jobs at a time. • CPU’s time is shared among multiple users. • Multiple users access the system simultaneously through terminals. • n users  each one will see 1/n of computer speed. • Response time still acceptable from a human.

  28. Reading Material • Stallings, chapter 7, pages 236-239, 242-244 • Stallings, chapter 8, pages 259-271

More Related