1 / 19

An Empirical Evaluation of Semiconductor File Memory as a Disk Cache

An Empirical Evaluation of Semiconductor File Memory as a Disk Cache. John C. Koob Duncan G. Elliott Bruce F. Cockburn VLSI Design Lab ECE Department University of Alberta Edmonton, Alberta Canada. Outline. Motivation Extended Storage File Memory Experimental Platform

sharon-carney
Télécharger la présentation

An Empirical Evaluation of Semiconductor File Memory as a Disk Cache

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. An Empirical Evaluation of SemiconductorFile Memory as a Disk Cache John C. Koob Duncan G. Elliott Bruce F. Cockburn VLSI Design Lab ECE Department University of Alberta Edmonton, Alberta Canada

  2. Outline • Motivation • Extended Storage • File Memory • Experimental Platform • Cost/Performance Analysis • Conclusions

  3. Motivation Source: Computer Architecture, Hennessy & Patterson, 2003

  4. Access Time Gap Problem • Use Extended Storage • Cheaper per bit than main memory • Faster than disk • Slower than main memory • Potential for power savings • How to fill the access time gap?

  5. Historical Systems • Extended storage first appeared in expensive systems • IBM 3090mainframe • Main memory: 0.5 GB • Extended storage: 4 GB • Terminology: Expanded Storage Image courtesy of www.ibm.com

  6. Historical Systems • Extended storage first appeared in expensive systems • Cray Y-MPsupercomputer • Main memory: 1 GB of 15-ns SRAM • Extended storage: 4 GB of 50-ns DRAM • Terminology: Solid State Disk Image courtesy of the Charles Babbage Institute

  7. Recent Research • Compressed caching (1999-2003) • Compression can reduce paging costs • Adaptive sizing of compressed page cache • Multi-level main memory (WMPI 2004) • 30% of memory must run at DRAM speed • Remaining memory can be slower

  8. Extended Storage Today? • Emerging technology may prompt a return to extended storage • Semiconductor file memory • Up to 5 times slower than DRAM • Cheaper per bit than DRAM • MEMS probe-based storage • 5 times faster than disk • 10 times more expensive than disk

  9. What is File Memory? • File memory leverages current DRAM technology • DRAM design constraints increase costs per bit • 100% of nominal capacity must be functional • Contiguous address space • File memory relaxes DRAM’s design constraints • Bad block marking to improve yield • Address space is not contiguous • Improve density at the expense of performance (e.g. multi-level DRAM or hardware compression)

  10. Contiguous Memory Non-Contiguous Memory Feasibility of File Memory • A precedent for file memory exists in the non-volatile memory market • NOR Flash memory • Limited capacity • Moderate reliability • Random-access supported • NAND Flash memory • High capacity • Low reliability  bad block marking • Restricted to sequential access

  11. Extended Storage Disk Cache • To evaluate file memory as extended storage: • Require an experimental platform • Modify Linux 2.4.18 OS kernel • ESDC Design Summary • High memory support • Page cache containment • Configurable performance • CPU caching issues • Performance metrics

  12. Postmark Results using File Memory

  13. Postmark Results Analysis Need 39% more file memory for equivalent performance

  14. Summary of Postmark Results

  15. Conclusions • Use file memory for extended storage • Leverage DRAM cell technology • Relax DRAM design constraints • Use bad block marking • Preliminary evaluation of ESDC • File memory can be up to 4 times slower than DRAM • Performance improved even with no page cache • Ongoing research • Evaluate hierarchies with file memory and page cache

  16. Selected References Bray. Bonnie. www.textuality.com/bonnie, 1996. Castro et al. Adaptive compressed caching. Symp. on Comp. Arch. And High Performance Computing, Nov. 2003. Ekman and Stenstrom. A case for multi-level main memory. WMPI 2004. Hennessy and Patterson. Computer architecture: A quantitative approach. Third Edition, 2003. Katcher. PostMark: A new filesystem benchmark. TR3022, Network Appliance, Oct. 1997. Koob et al. Test and characterization of a variable capacity multilevel DRAM. In Proc. VLSI Test Symp., pp. 189-197, May 2005. Uysal et al. Using MEMS-based storage in disk arrays. FAST 2003, pp. 89-101.

  17. Configurable Performance • How to model different file memory access times? • Use multiple page copies • Gives accurate file memory slowdown ratios • Problem: • Repeated page copies would be cached • Solution: • Disable CPU caches for ESDC • Use IA-32 memory type range registers (MTRRs)

  18. Experimental Setup • Experimental Platform • Processor 2.4 GHz Pentium 4 • Memory 2 GB DDR SDRAM • Hard disk 18-GB Seagate SCSI • Disk buffer 4-MB • Experimental Suite • PostMark – benchmark for many small files • Bonnie – file system benchmark • Kernel compilation – Linux kernel build

  19. Postmark Results for Original Hierarchy

More Related