1 / 26

Wire Length Prediction-based Technology Mapping and Fanout Optimization

Wire Length Prediction-based Technology Mapping and Fanout Optimization. Qinghua Liu Malgorzata Marek-Sadowska VLSI Design Automation Lab UC-Santa Barbara. Outline. Motivation and previous work Pre-layout wire length prediction Technology mapping with wire-length prediction

sorley
Télécharger la présentation

Wire Length Prediction-based Technology Mapping and Fanout Optimization

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Wire Length Prediction-based Technology Mapping and Fanout Optimization Qinghua Liu Malgorzata Marek-Sadowska VLSI Design Automation Lab UC-Santa Barbara

  2. Outline • Motivation and previous work • Pre-layout wire length prediction • Technology mapping with wire-length prediction • Fanout optimization with wire-length prediction • Experimental results • Conclusions and future work

  3. Motivation • Traditional logic synthesis does not consider accurate layout information • Placement quality depends on • netlist structure • placement algorithm

  4. Previous work • Logic and physical co-synthesis • Layout-driven logic synthesis • Local netlist transformations • Metric-driven structural logic synthesis • Adhesion • Distance

  5. Pre-layout wire-length prediction • Previous work • Statistical wire-length prediction • Lou Sheffer et al. “Why Interconnect Prediction Doesn’t work?” SLIP’00 • Individual wire-length prediction • Qinghua Liu et al. “Wire Length Prediction in Constraint Driven Placement” SLIP’03 • Semi-individual wire-length prediction • Predict that nets have a tendency to be long or short • Qinghua Liu et al. “Pre-layout Wire Length and Congestion Estimation” DAC’04

  6. Summary of the semi-individual wire length prediction technique • Predict lengths of connections • Mutual contraction • Predict lengths of multi-pin nets by • Net range

  7. Mutual contraction B.Hu and M.Marek-Sadowska, “Wire length prediction based clustering and its application in placement” DAC’03 v y u x

  8. Relative weight of a connection v Wr(u, v) = 0.71 u EQ1 y EQ2 Wr(x, y) = 0.5 x

  9. Mutual contraction of a connection Cp(x, y) = Wr(x, y) Wr(y, x) EQ3 Wr(u, v) = 0.71 Wr(v, u) = 0.33 Cp(u, v) = 0.234 Wr(x, y) = 0.71 Wr(y, x) = 0.6 Cp(x, y) = 0.426 v y j i u x

  10. Predictions on connections (a) (b) Mutual contraction vs. Connection length

  11. Net range 0 1 2 3 4 5 6 7 8 9 10 11 Circuit depth Example of net range

  12. Predictions on multi-pin nets Net range vs. average length for multi-pin nets

  13. Technology mapping with wire-length prediction (WP-Map) • Node Decomposition • Technology Mapping

  14. Node decomposition a b c a G b c a b c T.Kutzschebauch and L.Stok, “Congestion aware layout driven logic synthesis”, ICCAD’01

  15. CurrentPinNum>2? Greedy node decomposition algorithm CurrentPinNum=n N Done CurrentPinNum= CurrentPinNum-1 Y (n1,n2)=two input nets with largest mutual contraction Update mutual contraction Decompose(G,n1,n2) Remove n1 and n2, insert new net Decompose n-input gate G with wire length prediction

  16. Correlation between mutual contraction and interconnection complexity Average mutual contraction vs. Rent’s exponent

  17. Technology mapping EQ4

  18. Fanout optimization with wire-length prediction (WP-Fanout) • Net selection • Select all large-degree nets • Select small-degree nets with large net range • Net decomposition LT-tree Balanced tree Circuit depth

  19. Experiment setting • LGSyn93 benchmark suite • Optimized by script.rugged • Mapped with 0.13um industrial standard cell library • Placement is done by mPL4 • Global routing is done by Labyrinth

  20. Experimental results • Compare with the traditional area-driven technology mapping algorithm implemented in SIS • Results of the WP-Map algorithm • Results of combined WP-Map and WP-Fanout algorithm

  21. Compare WP-Map with SIS Compare mapped netlists

  22. Compare WP-Map with SIS (cont.) Average cut number distribution of C6288

  23. Compare WP-Map with SIS (cont.) Results after placement and global routing

  24. Compare WP-Map + WP-Fanout with SIS Results after placement and global routing

  25. Conclusions • Wire length can be predicted in structural level • Mutual contraction • Net range • Wire length prediction technique can be applied into technology mapping and fanout optimization • 8.7% improvement on average congestion • 17.2% improvement on peak congestion

  26. Future work • Logic extraction with wire-length and congestion prediction • Timing-driven technology mapping with wire-length prediction

More Related