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HW/SW co-simulation within the MODUS toolset

HW/SW co-simulation within the MODUS toolset. M3Systems: Leading SME in radionavigation. An independant SME founded in 1999, performing research and engineering in radio navigation and applications Activities include but not restrained to: Radio navigation technical studies

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HW/SW co-simulation within the MODUS toolset

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  1. HW/SW co-simulation within the MODUS toolset

  2. M3Systems: Leading SME in radionavigation • An independant SME founded in 1999, performing research and engineering in radio navigation and applications • Activities include but not restrained to: • Radio navigation technical studies • Airport applications • Critical transportations • … • Implied in several national and European projects.

  3. Summary • MODUS project and toolset • Principle and objectives • HW/SW co-simulation workflow • HW/SW co-simulation environment • HW/SW co-simulation demonstration

  4. Summary • MODUS project and toolset • Principle and objectives • HW/SW co-simulation workflow • HW/SW co-simulation environment • HW/SW co-simulation demonstration

  5. MODUS project and toolset • MODUS aims to help SMEs to substantially improve their positioning in the embedded-systems development market • MODUS is a set of open and customizable methodologies including: • Model verification by guiding the selection of existing open-source model verification engines • Interfacing with standard simulation platforms for HW/SW co-simulation • Software performance-tuning optimization through automated design transformations • Customizable source-code generation towards respecting coding standards and conventions • MODUS does not aim to be competitive with the vendors of CASE tools that are presently used in embedded software engineering, but to bring the technology to SMEs.

  6. Summary • MODUS project and toolset • Principle and objectives • HW/SW co-simulation workflow • HW/SW co-simulation environment • HW/SW co-simulation demonstration • Rely on an efficient and fast way to perform the steps of the iteration The actual implementation of the methodology usually relies on design, simulation, and analysis, of software models of systems i.e. Virtual Platforms

  7. Principle and objectives • Embedded systems design complexity is growing exponentially with more integrated applications and feature

  8. Principle and objectives • Y-Chart approach • Rely on an efficient and fast way to perform the steps of the iteration The actual implementation of the approach usually relies on design, simulation, and analysis, of software models of the system i.e. Virtual Platforms Clear separation between architecture and application Architecture Application Mapping Changes in architecture Changes in application System Analysis Iterative

  9. Principle and objectives • MODUS approach Architecture Application High level modelling of architecture Model of the architecture Model of the application Generation of Virtual Platform Virtual Platform Software binary Mapping Changes in architecture Changes in application “Executable” System Co-simulation

  10. Summary • MODUS project and toolset • Principle and objectives • HW/SW co-simulation workflow • HW/SW co-simulation environment • HW/SW co-simulation demonstration • Rely on an efficient and fast way to perform the steps of the iteration The actual implementation of the methodology usually relies on design, simulation, and analysis, of software models of systems i.e. Virtual Platforms

  11. HW/SW co-simulation workflow • MODUS full HW/SW co-simulation workflow: • Define the hardware architecture • Model the architecture using UML • Generate the SystemC virtual platform • Complete and configure the virtual platform • Generate the executable virtual platform • Integrate the SW Binaries in the platform • Co-simulate the executable system • Change the architecture if needed • Re-iterate Embedded system Embedded system HW Embedded system SW Architecture modelling Model of the architecture Virtual Platform generation Generated Virtual Platform MODUS software design flow Virtual Platform completion and configuration Changes in architecture Changes in application Virtual Platform Virtual Platform compilation SW Binary Executable Virtual Platform Mapping “Executable” System Co-simulation

  12. HW/SW co-simulation workflow • Architecture modelling using UML Marte • Structure composite diagram with restrictions on constructs • A system is modelled as a set of components interconnected through ports to a bus. • Class stereotyped with a subset of MARTE HwLogical stereotypes and some of their properties HwProcessor , HwBus (latency), HwRAM (latency, size), HwIO, HwDevice, HwEndPoint

  13. HW/SW co-simulation workflow • Virtual Platform generation • SystemC : C++ library for systems modelling, which includes a simulation kernel. Modules, ports, channels, processes, events, specific datatypes… • TLM2.0 : Extension to SystemC with the purpose to abstract communications with high level transactions. Suited for the modelling of memory-mapped bus systems. Generic payload, sockets… supporting two coding styles : Loosely Timed and Approximately Timed.

  14. HW/SW co-simulation workflow • Virtual Platform generation • Generation of a Loosely-Timed virtual platform • Modules are generated as skeletons to be completed by MODUS users (except Bus and Memories (SRAM), as well as a set of probes).

  15. Summary • MODUS project and toolset • Principle and objectives • HW/SW co-simulation workflow • HW/SW co-simulation environment • HW/SW co-simulation demonstration • Rely on an efficient and fast way to perform the steps of the iteration The actual implementation of the methodology usually relies on design, simulation, and analysis, of software models of systems i.e. Virtual Platforms

  16. HW/SW co-simulation environment • HW/SW co-simulation environment • Built over the Eclipse framework as a set of specific plug-ins Eclipse plug-ins Compilation with external tools: Eclipse CDT Visual Studio … Graphical UML modeller MDT Papyrus Generation engine Acceleo Completion and configuration Eclipse UML MARTE model Generated SystemC virtual platform Configured SystemC virtual platform

  17. Summary • MODUS project and toolset • Principle and objectives • HW/SW co-simulation workflow • HW/SW co-simulation environment • HW/SW co-simulation demonstration • Rely on an efficient and fast way to perform the steps of the iteration The actual implementation of the methodology usually relies on design, simulation, and analysis, of software models of systems i.e. Virtual Platforms

  18. Virtual platform demonstration • Completely generated modules • Memory • PLBBus • Generated modules, but completed and configured by the user • MicroBlaze • UART • Acquisition and tracking • Positining • “Data transfer” software compiled using Xilinx tools and loaded into the virtual platform memory “Data Transfer” Software GNSS data Acquisition GNSS data positioning

  19. Than you for your attention! Yann Leclerc R&D Engineer – M3 Systems Tel: +33 5 62 23 10 84 Fax: +33 5 62 23 10 81 email: leclerc@m3systems.net • ChaficJaber, PhD • ResearchEngineer – M3 Systems • Tel: +33 5 62 23 10 • Fax: +33 5 62 23 10 81 email: jaber@m3systems.net

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