ENDCAP MUON (EMU ) CATHODE STRIP CHAMBER (CSC) SYSTEM AT CMS

1. Topical Workshop on Electronics for Particle Physics TWEPP-08, Naxos, Greece / 15-19 September 2008 MEZZANINE CARDS FOR THE EMU CSC SYSTEM UPGRADE AT THE CMS M.Matveev (matveev@rice.edu), P.Padley (padley@rice.edu) Rice University, Houston, TX 77005 USA ENDCAP MUON (EMU ) CATHODE STRIP CHAMBER (CSC) SYSTEM AT CMS Chambers ● 468 trapezoidal chambers located in the Endcap regions of the CMS ● 6-layer multi-wire proportional chambers arranged in four stations ● Intended for muon identification, triggering and momentum measurement Electronics ● On-chamber mounted electronic boards - Cathode Front-End Board (CFEB), 4 or 5 boards per chamber - Anode Front-End Board (AFEB), 12..42 boards per chamber - Anode Local Charge Track (ALCT) Card, one per chamber ● Trigger and DAQ boards in sixty 9Ux400 mm VME crates on the periphery of the return yokes of CMS; each peripheral crate houses: - Up to 9 Trigger Motherboards (TMB2005) - Up to 9 Data Acquisition Motherboards (DMB) - One Muon Port Card (MPC2004) - One Clock and Control Board (CCB) - One custom VME Crate Controller (VCC) ● One 9Ux400 mm Track Finder (TF) VME crate in the underground counting room - 12 Sector Processors (SP05) - One Muon Sorter Board (MS2005) - One Clock and Control Board (CCB) - One Detector Dependent Unit (DDU) Card - One CAEN V2718 VME Crate Controller ● Four 9Ux220 mm Front End Driver (FED) VME crates in the underground counting room; each FED crate houses: - 9 Detector Dependent Unit (DDU) Cards - One Data Concentrator Card (DCC) - One CAEN V2718 VME Crate Controller ● >14K custom electronic boards in total ● ~5000 Xilinx FPGA, including ~1000 mezzanine FPGA Track Finder Crate Rack with two peripheral crates FED crate FPGA MEZZANINE UPGRADE Existing FPGA Mezzanines in the EMU CSC System Xilinx Virtex FPGA Families Results of simulation of two EMU/Trigger projects Rice University is responsible for: Muon Port Card (MPC) Advantages of Virtex-5: ● Higher performance due to 65nm technology ● More flexible basic slice (4 LUT + 4 Flip-flops) ● Better clocking routing ● More embedded memory ● Four sub-families: - General purpose LX - Serial connection oriented LXT - Signal processing oriented SXT - Embedded applications oriented FXT ● Potential ability to self-correct single event errors and detect double errors using the Internal Configuration Access Port Disadvantages: ● Less user input/output pins available for similar packages (compare with Virtex-2) Muon Sorter (MS) ● Designed and built by a team from the University of Florida (Gainesville, FL), UCLA and PNPI (Russia) in 2001-2005 ● Three types of mezzanines: - High speed/high count of i/o for the SP05 and MS2005 - High speed/average count of i/o for the TMB2005 - Average speed/average count of i/o for the ALCT and MPC2004 ● Based on Xilinx Virtex-E and Virtex-2 FPGA and XC18V04 EPROMs ● With the progress of firmware development it became clear by 2008 that the FPGA resources are limited for some designs. Proposed solution: upgrade mezzanine(s) to most advanced Xilinx Virtex-5 family; use the same host boards. Conclusion: ● ~50% performance improvement in comparison with the Virtex-2 FPGA ● Sorting “4 muons out of 36” can be done in one bunch crossing (25 ns) for the fastest Virtex-5 FPGA (in present design it takes 2 bunch crossings) ● Pin compatible XC5VLX50/85/110-FF1153 FPGA could be the optimal solution (logical resources, number of inputs/outputs, price) MEZZANINE GIGABIT LINK Texas Instruments TLK Family of SERDES Devices SERDES Mezzanine Board ● Seven pin compatible devices in the 64-pin VQFP Thermally Enhanced Package ● Serialization and deserialization of 16- or 18-bit parallel data words at 25MHz…156.25MHz ● Industry standard 8B/10B or start/stop encoding ● Current- or Voltage Mode serial interface ● Embedded PRBS generator for 5 devices out of 7 ● TLK device, SFP cage and 4-row 80-pin connector to host board ● 103 mm x 23 mm x 13.7 mm ● Samtec MOLC-120-31-S-Q (mezzanine) and FOLC-120-01-S-Q (host board) connectors ● Interface to host board comprises all the TLK and SFP data, control and monitoring signals ● 3.3V and 2.5V (optional) supply voltages are provided from the host board ● Samples of the mezzanine with the TLK1501/2501/3101 devices are available ● Multi Source Agreement (MSA) compliant Small Form Factor Pluggable (SFP) footprint ● Duplex LC connector ● Transmission up to 150 m on 50/125 um multimode fiber at 4.25Gbps ● Several vendors, typical price <$100 per module