CHAP 8 Hardware Management

1. CHAP 8 Hardware Management ANT LAB@CCUCOMM 鄭伊騏 (JOE)

2. Outline • 8.1 I/O port and I/O Memory • 8.2 Using I/O port • 8.3 Using Digital I/O Ports • 8.4 Using I/O Memory

3. I/O port and I/O Memory • Every peripheral device is controlled by writing and reading its registers. • At the hardware level, both memory regions and I/O regions are accessed by asserting electrical signals on the address bus and control bus (i.e., the read and write signals) and by reading from or writing to the data bus.

4. A programmer accessing I/O registers must be careful to avoid being tricked by CPU (or compiler) optimizations that can modify the expected I/O behavior. • The main difference between I/O registers and RAM is that I/O operations have side effects.

5. A sequence of instructions can be executed more quickly if it is run in an order different from that which appears in the program text, for example, to prevent interlocks in the RISC pipeline. • For conventional memory：The optimizations are transparent, for I/Ooperations：they interfere with those ‘‘side effects’’.

6. Solutions • place a memory barrier(記憶屏障)between operations that must be visible to the hardware in a particular order and normal instructions. • Linux provides four macros to cover all possible ordering needs.

7. Declare the memory barrier • #include <linux/kernel.h> void barrier (void);宣告一個 memory barrier • #include <asm/system.h> void rmb (void); 保證在barrier前的read動作都完成 void wmb (void);保證在barrier前的write動作都完成 void mb (void);保證讀、寫兩種動作都會被落實執行 P.S memory barrier會影響效率,真正需要才使用

8. 確保前三項指令都完成 插入Memory Barrier Example for memory barrier • writel (dev->registers.addr, io_destination_address); • writel (dev->registers.size, io_size); • writel (dev->registers.operation, DEV_READ); • wmb (); • writel (dev->registers.control, DEV_GO);

9. Using I/O port • I/O ports must be allocated before being used by your driver. • #include <linux/ioport.h> • int check_region(unsigned long start,unsigned long len); • struct resource *request_region(unsigned long start, unsigned long len,char *name); • void release_region(unsigned long start,unsigned long len); • More details please see Chapter 2(2.5.1 I/O port & I/O Memory)

10. Functions of access I/O port • You can find following functions in <asm/io.h>(architecture-dependent header) • For 1 byte ports (eight bits wide)： • unsigned inb (unsigned port); • void outb (unsigned char byte, unsigned port); • For 16bits ports (word wide)： • unsigned inw(unsigned port); • void outw(unsigned short word, unsigned port); • For 32bits ports (longword wide)： • unsigned inl(unsigned port); • void outl(unsigned longword, unsigned port);

11. String Operations • In addition to the single-shot in and out operations, some processors implement special instructions to transfer a sequence of bytes, words, or longs to and from a single I/O port or the same size. • These are the so-called string instructions, and they perform the task more quickly than a C-language loop can do.

12. Prototype of String Operations • Read or write count bytes starting at the memory address addr. Data is read from or written to the single port port. • void insb(unsigned port, void *addr, unsigned long count); • void outsb(unsigned port, void *addr, unsigned long count); • void insw(unsigned port, void *addr, unsigned long count); • void outsw(unsigned port, void *addr, unsigned long count); • void insl(unsigned port, void *addr, unsigned long count); • void outsl(unsigned port, void *addr, unsigned long count);

13. Pausing I/O • Some platformscan have problems when the processortries to transfer data too quickly to or from the bus like ISA. • Pausing functions are exactly like those listed previously, buttheir names end in _p; they are called inb_p, outb_p, and so on.

14. Platform Dependencies • I/O instructions are highly processor dependent. Each platform may only support some I/O instructions. • More details, please check on the textbook P.232-234 (English Version) or P.248-P.250 (Chinese Version).

15. Using Digital I/O Ports • When you write a value to an output location, the electrical signal seen on output pins is changed according to the individual bits being written. • To watch what happens on the parallel connector, and if you have a bit of an inclination to work with hardware, you can solder a few LEDs to the output pins.

16. Parallel port • PC standard starts the I/O ports for the first parallel interface at 0x378, and for the second at 0x278. • One parallel port is made up of three 8-bit ports. • The first port is a bidirectional data register; it connects directly to pins 2 through 9. • The second port is a read-only status register. • The third port is an write-only control register.

18. Using I/O Memory • Both registers and device memory are called I/O memory because the difference between registers and memory is transparent to software. • The main mechanism is used them to communicate with devices. • I/O memory is simply a region of RAM-like locations that the device makes available to the processor over the bus.