1. Microcontrollers Class : 4th Semister E&C and EEE Subject Code: 06ES42 Chapter : UNIT 1-2 Class : 2 Date : 15th Feb 2010 D R Subramanyam drs@slntech.com

2. Revision of Previous Class topics

3. Revision of Previous Class Microprocessor Microcontroller Difference between MP and MC MC Architecture RISC CISC Harvard Von Newmann

4. Microprocessors “A microprocessor is a multipurpose, programmable, clock driven, register – based electronics device that reads binary instructions from a storage device called memory, accepts binary data as input and processes data according to those instructions and provides results as output” • Example：Intel’s x86, Motorola’s 680x0 Data Bus Many chips on mother’s board CPU General-Purpose Micro-processor Serial COM Port I/O Port RAM ROM Timer Address Bus General-Purpose Microprocessor System

5. Microcontroller: • A smaller computer • On-chip RAM, ROM, I/O ports... • Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8X and PIC 16X CPU RAM ROM A single chip Serial COM Port I/O Port Timer Microcontroller

6. Microprocessor CPU is stand-alone, RAM, ROM, I/O, timer are separate designer can decide on the amount of ROM, RAM and I/O ports. expensive versatility general-purpose Microcontroller CPU, RAM, ROM, I/O and timer are all on a single chip fix amount of on-chip ROM, RAM, I/O ports for applications in which cost, power and space are critical single-purpose Microprocessor vs Microcontroller

7. RISC (Reduced Instruction Set Computing Processor)

8. CISC (Complex Instruction Set Computing Processors) • Numerous Instruction Group • Numerous Addressing Modes • Microcoded Instructions • Microcontrollers and Microprocessors are CISC based. • DSP’s are closer to RISC.

9. Von Newmann Architecture

10. Harvard Architecture

11. Let us know more about Microcontrollers

12. Microcontroller’s internal Blocks • CPU ( ALU, Registers, Oscillator/clock, Bus control) • RAM /Data memory • ROM / program memory • I/O ports • Timer/counters • Serial ports • Interrupts

13. Let us put together all what we discussed

14. Microcontroller Block Diagram External interrupts On-chip ROM for program code Timer/Counter Interrupt Control Timer 1 On-chip RAM Counter Inputs Timer 0 CPU Serial Port Bus Control 4 I/O Ports OSC P0 P1 P2 P3 TxD RxD Address/Data

15. Microcontroller Block Diagram Internal ROM ALU I/O Ports Accumulator Registers Program Counter Stack Pointer Counter/Timer Serial Port Internal RAM Interrupt Logic Oscillator Bus Control

18. The 8051 Oscillator and Clock

19. Program Counter and Data pointer Program Counter (PC): Program counter is a 16 bit Register. It holds the address of the next instruction to be executed. It does not have internal address (PC is the only register not having the internal address) Data Pointer (DPTR): DPH and DPL DPTR is used to furnish memory address for internal and external code access and external data access

20. A and B CPU Registers • A and B registers are the two registers among the 34 general purpose registers • Holds results of many instructions, particularly math and logical operations • A register (Accumulator) is the most versatile and is used for many • operations including addition, subtraction, integer multiplication and division • and Boolean bit manipulations • A register is also used for all data transfer between 8051 and any external • memory • B register is used with A register for multiplication and division operations.

21. Flags and Program Status Word (PSW)

22. Internal Memory Internal RAM - 128 bytes 00H to 7FH Internal ROM - 4 K Bytes 000H to FFFH

23. Internal RAM

25. The Stack and Stack pointer(SP) Stack area: Part of Internal RAM It is limited in height to the size of internal RAM Stack Pointer (SP): 8 bits wide Increments unlike many microprocessors where SP decrements On RESET it is et to 07H

26. The Stack and Stack pointer(SP)

27. Special Function Registers(SFRs)

28. Special Function Registers(SFRs) Note: Program Counter Register is not a special function Register

29. Special Function Registers

30. Special Function Registers-Continued

31. Internal ROM

32. Input / Output Pins, Ports and Circuits

33. Read latch Vcc TB2 Load(L1) P1.X pin Internal CPU bus DQ ClkQ P1.X M1 Write to latch TB1 Read pin A Pin of Port 1 P0.x 8051 IC

34. Read latch Vcc Load(L1) P1.X pin Internal CPU bus DQ ClkQ P1.X M1 Write to latch Read pin Writing “1” to Output Pin P1.X TB2 2. output pin isVcc 1. write a 1 to the pin 1 output 1 0 TB1 8051 IC

35. Read latch Vcc Load(L1) P1.X pin Internal CPU bus DQ ClkQ P1.X M1 Write to latch Read pin Writing “0” to Output Pin P1.X TB2 2. output pin is ground 1. write a 0 to the pin 0 output 0 1 TB1 8051 IC

36. Read latch Vcc Load(L1) P1.X pin Internal CPU bus DQ ClkQ P1.X M1 Write to latch Read pin Reading “High” at Input Pin 2. MOV A,P1 external pin=High TB2 • write a 1 to the pin MOV P1,#0FFH 1 1 0 TB1 3.Read pin=1 Read latch=0 Write to latch=1 8051 IC

37. Read latch Vcc Load(L1) P1.X pin Internal CPU bus DQ ClkQ P1.X M1 Write to latch Read pin Reading “Low” at Input Pin 2. MOV A,P1 external pin=Low TB2 • write a 1 to the pin • MOV P1,#0FFH 1 0 0 TB1 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC

38. Other Pins • P1, P2, and P3 have internal pull-up resisters. • P1, P2, and P3 are not open drain. • P0 has no internal pull-up resistors and does not connects to Vcc inside the 8051. • P0 is open drain. • Compare the figures of P1.X and P0.X.  • However, for a programmer, it is the same to program P0, P1, P2 and P3. • All the ports upon RESET are configured as output.

39. Read latch TB2 P0.X pin Internal CPU bus DQ ClkQ P1.X M1 Write to latch TB1 Read pin A Pin of Port 0 P1.x 8051 IC

40. Control Signals Address/Data Input/Output Pins, Ports and Circuits

41. Control Signals Address/Data Input/Output Pins, Ports-PORT0

42. Input/Output Pins, Ports-PORT1

43. Input/Output Pins, Ports-PORT2

44. Input/Output Pins, Ports-PORT3

45. External Memory

46. External Memory Timing Wave Forms

47. Counters and Timers

48. Timer :

49. Counting

50. TCON-Timer Control SFR