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Status HV boards

This report details multiple trials conducted to assess leakage currents in high voltage (HV) boards at CERN. Initial tests indicated leakage currents of 100 nA and challenges related to humidity. Several trial phases focused on encapsulation, improved casting, and mechanical mounting of capacitors, revealing persistent issues such as broken capacitors and thermal shocks ranging from -40°C to +120°C. The results suggest a need for refined soldering techniques and effective capacitor monitoring to enhance reliability in harsh conditions.

irene-ramsey
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Status HV boards

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  1. Status HV boards HV boards 1.FIRST ASDBLR HV PROTO BOARD: leakage currents on 100nA CH, humidity at cern. 2. TRIAL 1Encapsulate caps in Printed Circuit Board 20-80 C schock, Ileak 1nA, (later increase) 3 broken caps Sparking under cap’s Test cycles 10-80C for 2 weeks, 3. TRIAL 2 improved casting, pick and place paste, no cleaning slurry Still broken capacitors (not HV but mechanical) Curved boards 4. TRIAL 3 Still broken caps Now thermal shocks -40 to +120 C Most probably Rework solder problem 5. TRIAL 4 Now better mounting on flat bad, ‘no rework’ , capacitor monitorring 6. If failing “open Boards” with vac casting

  2. New HV board without fuses

  3. Capacitor monitoring checklist

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