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Architectures and Programmable Logic Devices

This section provides a comprehensive review of programmable logic types suitable for military and aerospace systems. It covers PALs, PLAs, PROMs, CPLDs, and FPGAs, comparing architectures such as Actel's antifuse devices and Xilinx's Virtex series. The discussion extends to upcoming architectures like the AT6010 and Quicklogic-UTMC developments, addressing radiation considerations and device reliability. Coverage includes logic and memory architectures, I/O modules, packaging, and performance analysis, with references for further exploration.

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Architectures and Programmable Logic Devices

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  1. ArchitecturesandProgrammable Logic Devices

  2. Abstract This section will begin with the review of different programmable logic types available for military and aerospace systems. These include PALs, PLAs, PROMs, CPLDs, and FPGAs. Device architectures will be discussed and compared with emphasis given to those architectures used in production systems such as Actel's antifuse devices, UTMC's UT22VP10 PAL, and Xilinx XQR4000XL and Virtex series devices. An introduction will be given to architectures that are being developed for military and aerospace systems such as the AT6010, the Quicklogic-UTMC developments, the MRC Orion, and the Actel ProASIC series. Radiation considerations will be summarized for different architectures and device technologies.

  3. What This Section Will Cover • Various programmable logic types • Device architectures • Device performance • Packaging • Reliability • Some radiation considerations • Lessons learned

  4. 1: Introduction 2: Applications 3: Logic Review 4: FPGA Architecture 5: Programmable Elements 6: Logic Modules 7: PLD Architectures 8: Memory Architectures 9: I/O Modules 10: Packaging and Mechanical Aspects 11: Reliability 12: Thermal Considerations 13: Speed 14: Power Section Contents

  5. References References are available for most slides • Original work • available on http://rk.gsfc.nasa.gov • Manufacturers’ data sheets, application notes • Papers and reports • Many from MAPLD 1998, 1999, 2000 • Standard logic design textbooks

  6. Lessons Learned (1) Barto's Law: Every circuit is considered guilty until proven innocent.

  7. Lessons Learned (2) Launched: March 4, 1999 Failed: March 4, 1999

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