Advanced VLSI Design Workshop

1. Advanced VLSI Design Workshop 課程日期：2007年12月14日（星期五） 8:30~16:30 課程地點：國立台灣大學電機二館105室(台北市羅斯福路四段一號) 主 講 人：(1)Prof. Yu Hen Hu 現職：國立台灣大學電子工程研究所客座教授 經歷：University of Wisconsin - Madison, Department of Electrical and Computer Engineering 課程大綱： Many multimedia embedded systems are implemented on a system-on-chip (SoC) platform. To seek balance between performance (throughput, quality) versus cost (energy, chip real estate), it is essential to explore available design options. In this portion of the short course, I will high-light the notion of algorithmic design space exploration. The thesis is on exploiting equivalent algorithm formulations in order to develop globally optimal design. In particular, I will survey three classes of equivalence that arise in modern multimedia algorithms: algebraic equivalence, numerical equivalence, and functional equivalence. I will present algorithm design, transformation, and analysis methods that facilitate efficient exploration of these classes of algorithmic space equivalence relations. I will also use existing multimedia algorithms as design examples to illustrate the approach that leads to optimal SoC design through algorithmic design space exploration. (2)Prof. Naresh Shanbhag 現職：國立台灣大學電子工程研究所客座教授 經歷：Coordinated Science Laboratory, University of Illinois at Urbana-Champaign 課程大綱：Next generation communication SOCs need to address the key challenge of implementing systems with ever increased complexity, hence power, in fragile nano-scale process technologies. Power and reliability are two resulting problems that need to be addressed jointly in order to provide acost-effective solution in emerging markets. This two-part lecture will present a communications-inspired paradigm for communication SOC design that elegantly addresses the power-reliability problem. The proposed paradigm was developed at the University of Illinois at Urbana-Champaign in 1996 and has today become a mainstream research topic. It views SOCs as miniature communication networks, and employs information and communication-theoretic principles to design low-power and reliable SOCs. The communication-inspired design paradigm requires the SOC designer of the future to understand the very basis of information transfer across noisy channels, and unify system/algorithmic, architectural & circuit level considerations in order to maximize energy-efficiency without compromising reliability. After introducing the communications-inspired view of SOC design, the lecture will illustrate the application of the proposed paradigm in the design of critical communication SOC subsystems such as motion estimation engines, equalizers, on-chip busses, high-speed serial back-plane links and culminate with a case study of a 10 Gb/s maximum likelihood sequence estimation (MLSE)-based receiver. 議程： 報名方式：請由台大系統晶片中心網站http://soc.ee.ntu.edu.tw線上報名 報名截止日期：96年12月11日（星期二）前 費用：NT$ 1000(含講義、 午餐、茶點) 【台大系統晶片中心之合作會員廠商，可享有二個人次免費】 【在學學生優惠每位NT$500（限本人，請攜在學證件備查）】 聯絡方式 : 國立台灣大學系統晶片中心, 台大博理館311室, 唐珮寧小姐 Tel: (02)3366-3531, Email: paulinet@cc.ee.ntu.edu.tw