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Statistical Static Timing Analysis

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Statistical Static Timing Analysis. Student: 鄒東臻 Advisor: Chun-Yao Wang 2013.11.4. Outline. Introduction SSTA v.s . STA Random variation Basic techniques of SSTA Basic SSTA operations Path-based and block-based SSTA SSTA at nominal voltages SSTA at ultra-low voltages

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Statistical Static Timing Analysis
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  1. Statistical Static Timing Analysis Student: 鄒東臻 Advisor: Chun-Yao Wang 2013.11.4

  2. Outline • Introduction • SSTA v.s. STA • Random variation • Basic techniques of SSTA • Basic SSTA operations • Path-based and block-based SSTA • SSTA at nominal voltages • SSTA at ultra-low voltages • NLOPALV 1. Cell delay , 2. Timing path • Conclusion

  3. Introduction(1/2) • SSTA v.s. STA • STA: 1. STA analyzes at the worst-case or best-case. 2. STA analyzes using excessive margins for delay. • SSTA: 1. SSTA is to calculate the delay time distribution. 2. Use Monte Carlo simulation. 3. The basic SSTA method define the random variation as r.v. and calculates the PDF of circult delay.

  4. Introduction(2/2) • Random variation • Random variation occur without regard to the location and patterns of transistors within a chip.

  5. Basic techniques of SSTA(1/2) • Basic SSTA operations: • Use statistical sum and max operations. • Probabilistic Boolean

  6. Basic techniques of SSTA(2/2) • Path-based and block-based SSTA • Path-based: Accurately calculates the delay PDF of each path, but need lots of computation time. • Block-based:Less computation time, but not accurately calculates the delay PDF.

  7. SSTA at nominal voltages(1/3) • At nominal voltages, the circuit delay can be assume linear in random variation and the distribution of random variation is Gaussian. • Two type of delay need to be computed: • Single path delay • Maximum delay of multiple paths

  8. SSTA at nominal voltages(2/3) • Single path delay:

  9. SSTA at nominal voltages(3/3) • Maximum delay of multiple paths:

  10. SSTA at ultra-low voltages(1/16) • Paper: “The effect of Random Dopant Fluctuations on logic timing at low voltage” • When = 0.5V , statistical variations in the transistor threshold voltages become an important factor. • At low voltage, local variations result primarily from random dopant fluctuations (RDFs). • At low voltage, circuit delay is a nonlinear function of the transistor random variables. • NLOPALV

  11. SSTA at ultra-low voltages(2/16) • NLPOALV (Cell delay) : 1. 2. By convolution formula :

  12. SSTA at ultra-low voltages(3/16) 3.

  13. SSTA at ultra-low voltages(4/16) 4. Operating point :

  14. SSTA at ultra-low voltages(5/16) 1. 2.

  15. SSTA at ultra-low voltages(6/16)

  16. SSTA at ultra-low voltages(7/16) 3. 4.

  17. SSTA at ultra-low voltages(8/16) • Generalizing to N-dimensions gives the fundamental resultof NLOPALV. 5. 6. 7.

  18. SSTA at ultra-low voltages(9/16)

  19. SSTA at ultra-low voltages(10/16) • Result:

  20. SSTA at ultra-low voltages(11/16) • NLPOALV (Timing path) : • Case1: (ignore the correlation due to slew propagation) • Assumptions: (1) The cell’s stochastic delay in the timing path, is statistically independent. (2) The TP delay becomes a linear sum of the individual cell delay:

  21. SSTA at ultra-low voltages(12/16) 1. 2. 3.

  22. SSTA at ultra-low voltages(13/16) • Case2: (Correlation due to stochastic slew propagation) 1. 2.

  23. SSTA at ultra-low voltages(14/16) 3. 4.

  24. SSTA at ultra-low voltages(15/16) 5. 6.

  25. SSTA at ultra-low voltages(16/16) • Result:

  26. Conclusion • NLOPOLV is a more efficient method than Monte-Carlo.