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Built-In Self Test (BIST)

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Built-In Self Test (BIST)

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  1. Built-In Self Test (BIST)

  2. Built-In Self Test (BIST) Outline • 1. Introduction and Basic Principles • 2. Pattern Generation Techniques • 3. Signature Analysis Methods • 4. BIST Architectures • 5. Memory Test • 6. Summary

  3. Built-In Self Test (BIST) • 1. Introduction and Basic Principles • 2. Pattern Generation Techniques • 3. Signature Analysis Methods • 4. BIST Architectures • 5. Memory Test • 6. Summary 

  4. Built-In Self Test (BIST) • 1. Introduction and Basic Principles

  5. Built-In Self Test (BIST) • 1. Introduction and Basic Principles General Structure

  6. Reference Unit Under Test Data Generator Data Compressor Comparator Display BIST Controller Start/Stop Ready Electronic System Built-In Self Test (BIST) • 1. Introduction and Basic Principles General Structure

  7. Built-In Self Test (BIST) • 1. Introduction and Basic Principles

  8. Built-In Self Test (BIST) • 1. Introduction and Basic Principles

  9. Built-In Self Test (BIST) • 1. Introduction and Basic Principles

  10. Built-In Self Test (BIST) • 1. Introduction and Basic Principles • 2. Pattern Generation Techniques • 3. Signature Analysis Methods • 4. BIST Architectures • 5. Memory Test • 6. Summary 

  11. Built-In Self Test (BIST) • 2. Pattern Generation Techniques

  12. Built-In Self Test (BIST) • 2. Pattern Generation Techniques

  13. Built-In Self Test (BIST) • 2. Pattern Generation Techniques

  14. Built-In Self Test (BIST) • 2. Pattern Generation Techniques

  15. Built-In Self Test (BIST) • 2. Pattern Generation Techniques A fixed set of “optimal” test patterns, usually derived from fault simulation, is used.

  16. Built-In Self Test (BIST) • 2. Pattern Generation Techniques

  17. Built-In Self Test (BIST) • 2. Pattern Generation Techniques

  18. Built-In Self Test (BIST) • 2. Pattern Generation Techniques

  19. Built-In Self Test (BIST) • 2. Pattern Generation Techniques

  20. Built-In Self Test (BIST) • 2.1. Pseudo-Random Generation using LFSR

  21. Built-In Self Test (BIST) • 2.1. Pseudo-Random Generation using LFSR Example of a 4-bit LFSR as a Pattern Generator. Pseudorandom states generated by the LFSR.

  22. Built-In Self Test (BIST) • 1. Introduction and Basic Principles • 2. Pattern Generation Techniques • 3. Signature Analysis Methods • 4. BIST Architectures • 5. Memory Test • 6. Summary 

  23. Built-In Self Test (BIST) • 3.Signature Analysis Methods

  24. Built-In Self Test (BIST) • 3.Signature Analysis Methods Steps for Response Evaluation: 1 Methods for Response Evaluation 2 3 

  25. Built-In Self Test (BIST) • 3.Signature Analysis Methods Serial r-Bit (Internal XOR) Signature Generator. The content of the LFSR is the remainder of the division operation.

  26. Built-In Self Test (BIST) • 3.Signature Analysis Methods Serial r-Bit (External XOR) Signature Generator. The content of the LFSR is not the remainder of the division operation.

  27. Built-In Self Test (BIST) • 3.Signature Analysis Methods Serial Example of a 4-bit (External) Signature Generator.

  28. Built-In Self Test (BIST) • 3.Signature Analysis Methods Parallel r-Bit (Internal XOR) ParallelSignature Generator. r-Bit (External XOR) ParallelSignature Generator.

  29. Serial input Parallel input 2k-r – 1 2k – 1 2mL- r – 1 2mL – 1 Where: K: length of the sequence (# of bits) r: length of the LFRS (# of bits) Where: L: length of the sequence (# of test vectors) m: length of a vector (# of bits) r: length of the LFRS (# of bits) Built-In Self Test (BIST) • 3.Signature Analysis Methods Problem: When compacting results, there is a probability of fault masking! Probability of failing to detect an error in the response sequence:

  30. Built-In Self Test (BIST) • 3.Signature Analysis Methods Modular LFSR Serial Compacter Example

  31. Built-In Self Test (BIST) • 3.Signature Analysis Methods Modular LFSR Parallel Compacter Example

  32. Built-In Self Test (BIST) • 1. Introduction and Basic Principles • 2. Pattern Generation Techniques • 3. Signature Analysis Methods • 4. BIST Architectures • 5. Memory Test • 6. Summary 

  33. Built-In Self Test (BIST) • 4. BIST Architectures Built-In Logic Block Observer (BILBO)

  34. Built-In Self Test (BIST) • 4. BIST Architectures

  35. Built-In Self Test (BIST) • 4. BIST Architectures Built-In Logic Block Observer (BILBO) Modular Bus-Oriented Design with “BILBO”.

  36. Built-In Self Test (BIST) • 4. BIST Architectures

  37. Built-In Self Test (BIST) • 4. BIST Architectures General Form of a BILBO

  38. Built-In Self Test (BIST) • 4. BIST Architectures Example: 8-bit-Length Datapath

  39. Built-In Self Test (BIST) • 4. BIST Architectures Example: 8-bit-Length Datapath

  40. Built-In Self Test (BIST) • 4. BIST Architectures Example: 8-bit-Length Datapath

  41. Built-In Self Test (BIST) • 1. Introduction and Basic Principles • 2. Pattern Generation Techniques • 3. Signature Analysis Methods • 4. BIST Architectures • 5. Memory Test • 6. Summary 

  42. Built-In Self Test (BIST) Introduction for Memory Test

  43. Built-In Self Test (BIST) a) Mscan Test

  44. Built-In Self Test (BIST) b) Marching Test

  45. Built-In Self Test (BIST) c) Transparent BIST Test Transparent Built-In Self Test is a test algorithm that is periodically executed on the field in order to verify the integrity of large amounts of critical data stored on mass memory systems

  46. Built-In Self Test (BIST) c) Transparent BIST Test Main characteristics: 1)Minimum area overhead: this approach is one of the best choices found in the literature in terms of area overhead and types of faults detected in memory structures. E.g., authors claim an area overhead of 1.2% due to the inclusion of Transparent BIST in a 128Kbytes X 8bytes SRAM (this value decreases as the RAM size increases).

  47. Built-In Self Test (BIST) c) Transparent BIST Test Main characteristics: 2)High capability of fault detection: by indicating the occurrence of stuck-at faults, transition faults,coupling faults, decoder faults and read/write logic faults.

  48. Built-In Self Test (BIST) c) Transparent BIST Test Main characteristics: 3)Short “down times”: that are periodically required to check the functionality of mass memory systems used in real-time applications. The Transparent BIST approach presents the incomparable advantage of preserving the contents of the RAM memory after testing. Thus, this approach is very suitable for periodic testing since we do not need to save the memory contents before the test session and to restore them at the end of this session.

  49. Built-In Self Test (BIST) c) Transparent BIST Test  execution time Table 1. Transparent BIST Algorithm

  50. Built-In Self Test (BIST) c) Transparent BIST Test  execution time Table 2. Signature Prediction Algorithm • The data read during execution of sequences S1’ through S4’ of the Signature Prediction Algorithm (Table 1) are sometimes inverted in order to match the data read during the execution of sequences S1 through S4 of the Transparent BIST Algorithm (Table 1).