1. EEPROM Comparison – Parallel or Serial • Parallel • Pro’s • Easiest to write to • Higher memory density • Better AC performance • Con’s • Very large foot print (Size of 2N bits requires N pins, for addressing, and other pins for power, select, etc) • Can not erase one byte at a time, must erase by sector or array • Higher power consumption • Costly

2. EEPROM Comparison – Parallel or Serial • Serial • Pro’s • Smaller footprint (only about 8 pins) • Smaller power consumption (good if an onboard battery is used) • Faster access time • Cheaper • Con’s • More complexity involved in writing/reading data from EEPROM • Conclusion: Serial • Two different kinds of serial, SPI and I2C

3. EEPROM Comparison – SPI or I2C • I2C (Inter-integrated Circuit) • Pro’s • Easier to implement more than one device on same bus • Good for communicating with on-board devices that are accessed occasionally • Con’s • High complexity compared to SPI • Half-duplex

4. EEPROM Comparison – SPI or I2C • SPI (serial peripheral interface) • Pro’s • Faster • Full-duplex • Less overhead than I2C due to no addressing • Con’s • More devices requires more wires and more hardware • Conclusion: SPI

5. BACK UP SLIDES

6. Definition of Parallel EEPROM • Typically has 8-bit data bus • Address bus large enough to cover complete address range • Ex. 1024 addresses = 210 addresses, so 10 bits for a data bus • To Write: • Enable Write with Address Selected • Disable Write when data is asserted on data pins • To Read: • Enable Read with Address Selected • Read data asserted on data pins

7. Definition of Serial I2C • 2 wire-input • Serial Data (SDA) • Serial Clock (SCL) • Communication Process • Master sends start condition • Master sends unique 7-bit address of the slave • Master sends read/write bit (0 – write, 1 – read) • Receiver (Master when read, slave when write) sends “ACK”nowledgement • Transmitter (Master when write, slave when read) transmits 1 byte • Receiver sends ack (repeats till stop)

8. Definition of Serial SPI • 4 wires • MOSI – master data output, slave data input • MISO – master data input, slave data output • SCLK – clk • SS – Slave select • Clock polarity (CPOL) and Clock Phase (CPHA) determines active clock edge • Master and slave must agree on this • Read and Write procedures are dependent upon IC chosen