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Simulation of 16 bit ALU using Verilog hdl

In many digital circuits ALU is a basic building block. It can be used in integer arithmetic computations and as Complex operation. This research paper is based on the simulation of 16 bit ALU using VHDL. The design was implemented using VHDL Xilinx Synthesis tool ISE and targeted for Spartan device. An ALU performs following operations Addition, subtraction, multiplication, Not, logical shift right, logical shift left, rotate right, rotate left, OR, AND, XOR, NAND, NOR, XNOR and comparison between two signals. Mayank Mittal "Simulation of 16 bit ALU using Verilog-hdl" Published in International Journal of Trend in Scientific Research and Development (ijtsrd), ISSN: 2456-6470, Volume-2 | Issue-1 , December 2017, URL: https://www.ijtsrd.com/papers/ijtsrd5876.pdf Paper URL: http://www.ijtsrd.com/engineering/electronics-and-communication-engineering/5876/simulation-of-16-bit-alu-using-verilog-hdl/mayank-mittal<br>

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Simulation of 16 bit ALU using Verilog hdl

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  1. International Research Research and Development (IJTSRD) International Open Access Journal International Open Access Journal International Journal of Trend in Scientific Scientific (IJTSRD) ISSN No: 2456 - 6470 | www.ijtsrd.com | Volume ISSN No: 2456 | www.ijtsrd.com | Volume - 2 | Issue – 1 Simulation of 16 bit ALU using Verilog Simulation of 16 bit ALU using Verilog-hdl hdl Mr. Mayank Mittal epartment of Electronics and Telecommunication, nstitute of Technology Durg, Chhattisgarh Student, Department Bhilai Institute of ABSTRACT In many digital circuits ALU is a basic building block. It can be used in integer arithmetic computations and as Complex operation. This research paper is based on the simulation of 16 bit ALU using design was implemented using VHDL Xilinx Synthesis tool ISE and targeted for Spartan device. An ALU performs following operations subtraction, multiplication, Not, logical shift right, logical shift left, rotate right, rotate left, OR, AND, XOR, NAND, NOR, XNOR and comparison between two signals. INTRODUCTION In many digital circuits ALU is a basic building block. It can be used in integer arithmetic computations and as Complex operation. This research paper is based on simulation of 16 bit ALU using VHDL. The design was implemented using VHDL Xilinx and targeted for Spartan device. An ALU performs following operations – Addition, subtraction, multiplication, Not, logical shift right, t, rotate right, rotate left, OR, AND, XOR, NAND, NOR, XNOR and comparison between Table for different operation- Option 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 An arithmetic logic unit (ALU) is a combinational digital electronic circuit that performs arithmetic and bitwise operations. It fundamental building block of the central processing unit (CPU) of a computer. Modern CPUs contain very powerful and complex ALUs. An ALU performs basic arithmetic and logic operations. Examples of arithmetic operations are addition, subtrac multiplication, and division. Examples of logic operations are NOT, AND, and OR. All operations perform in a computer is in form of binary number i.e. 0 or 1. The logical operations are given below 0 or 1. The logical operations are given below- An arithmetic logic unit (ALU) is a electronic circuit that performs arithmetic and bitwise operations. It represents the fundamental building block of the central processing unit (CPU) of a computer. Modern CPUs contain very powerful and complex ALUs. An ALU performs basic arithmetic and logic operations. Examples of arithmetic operations are addition, subtraction, multiplication, and division. Examples of logic operations are NOT, AND, and OR. All operations perform in a computer is in form of binary number i.e. operation Addition Subtraction Multiplication Not Logical shift left Logical shift right Rotate left Rotate right And Or Xor Nor Nand xnor Greater comparison Equal comparison Table 2.1 Table 2.1 Greater comparison Equal comparison @ IJTSRD | Available Online @ www.ijtsrd.com @ IJTSRD | Available Online @ www.ijtsrd.com | Volume – 2 | Issue – 1 | Nov-Dec 2017 Dec 2017 Page: 114

  2. International Journal of Trend in Scientific Research and Development (IJTSRD) ISSN: 2456-6470 The time delay and memory usage is given in table no. 3.2 RTL schematic of ALU Delay 12.339ns Memory usage 235436 kilobyte Table 3.2 CONCLUSION Figure: 2.1 The simulation of 16 bit ALU is presented. This design is implemented using Verilog hdl and Xilinx ise and targeted for Spartan 3e family. The time delay is 12.339ns and memory usage is 235436 kilobyte. REFERENCE 1)Suchita Kamble, Prof .N. N. Mhala-VHDL Implementation of 8-Bit ALU IOSR Journal of Electronics and Communication Engineering (IOSRJECE) ISSN : 2278-2834 Volume 1, Issue 1 (May-June 2012), PP 07-11 2)Shikha IMPLEMENTATION OF ALU USING FPGA International Journal of Emerging Trends & Technology in Computer Science (IJETTCS) Volume 1, Issue 2, July – August 2012 ISSN 2278-6856 Khurana , Kanika Kaur- Figure: 2.2 Result Verilog hdl implementation of ALU was done using Xilinx ise. Detailed report is given below in table no. 3.1. 3)Prakash R Tonse, Siddalingesh S. Navalgund- Design, Development and Implementation of ALU, RAM and ROM for 8051 Microcontroller on FPGA using VHDL International Journal of Computer Applications (0975 – 8887) Volume 80 – No1, October 2013 Logic utilization used Available utilization Number of Slices 102 2448 4% Number of 4 input LUTs 192 4896 3% Number of bonded IOBs 68 108 62% Number of MULT18X18SIOs 1 12 8% Table: 3.1 @ IJTSRD | Available Online @ www.ijtsrd.com | Volume – 2 | Issue – 1 | Nov-Dec 2017 Page: 115

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