1. More Digital circuits

2. Ripple Counter • The most common counter • The problem is that, because more than one output is changing at once, the signal is glichy • To avoid this problem, use Gray or Johnson code

3. Johnson Counter • The Johnson counter is type of shift counter • Put an inverted MSB back to LSB • Glitch output free

4. Johnson Counter with error recovery

5. Linear Feedback Shift Registers • A small number of taps are recycled • An LFSR can operate at high speed compared to a binary counter because the feedback logic is very simple • Reduce clock noise

6. Many-to-One LFSR

7. Many-to-One LFSR

8. Maximal length LFSR • With maximal length logic (taps selected to give the maximal count), a small number of register can create sequence up to 2n-1

9. Divide by N LFSR Counter • An example of the use of a LFSR • A terminal count is provided as an input to be compared to

10. Divide by N LFSR Counter • Test fixture

11. 4-Bit LFSR One-to-Many Code • One-to-Many variant splits the XOR into 2-input gates and distributes them throughout the register array

12. Cyclic Redundancy Checksums • Error detection • The data packet is looked at as a huge binary number • A polynomial divide this number in GF • Reminder is checksum

13. Cyclic Redundancy Checksums

14. ROM • ROM stands for Read-Only Memory • This memory is initialized when the FPGA is configured and cannot be changed after configuration

15. ROM Version of LFSR • We can implement four-bit LFSR counter with a ROM

16. RAM • RAM stands for Random Access Memory • A RAM is an array of cells, addressable in groups N element wide and M elements deep

17. RAM

18. RAM • Unless the FPGA support embedded RAM blocks, it will consume a huge amount of logic

19. FPGA with embedded RAM

20. 256x8 RAM Implemented in the 4000XL Device Family

21. Dual port RAM

22. Jovan Popovic jocapc@panet.co.yu • Milos Milovanovic miloshm@yahoo.com • Veljko Milutinovic vm@galeb.etf.bg.ac.yu • Nobelovac?